| 55 | | #if defined(__APPLE__) |
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| 56 | | |
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| 57 | | #if defined(__ppc__) |
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| 58 | | |
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| 59 | | static inline int CAS(register uint32_t value, register uint32_t newvalue, register volatile void* addr) |
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| 60 | | { |
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| 61 | | register int result; |
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| 62 | | asm volatile ( |
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| 63 | | "# CAS \n" |
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| 64 | | " lwarx r0, 0, %1 \n" // creates a reservation on addr |
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| 65 | | " cmpw r0, %2 \n" // test value at addr |
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| 66 | | " bne- 1f \n" |
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| 67 | | " sync \n" // synchronize instructions |
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| 68 | | " stwcx. %3, 0, %1 \n" // if the reservation is not altered |
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| 69 | | // stores the new value at addr |
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| 70 | | " bne- 1f \n" |
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| 71 | | " li %0, 1 \n" |
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| 72 | | " b 2f \n" |
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| 73 | | "1: \n" |
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| 74 | | " li %0, 0 \n" |
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| 75 | | "2: \n" |
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| 76 | | : "=r" (result) |
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| 77 | | : "r" (addr), "r" (value), "r" (newvalue) |
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| 78 | | : "r0" |
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| 79 | | ); |
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| 80 | | return result; |
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| 81 | | } |
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| 82 | | |
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| 83 | | #endif |
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| 84 | | |
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| 85 | | #if defined(__i386__) || defined(__x86_64__) |
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| 86 | | |
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| 87 | | #ifdef __SMP__ |
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| 88 | | # define LOCK "lock ; " |
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| 89 | | #else |
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| 90 | | # define LOCK "" |
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| 91 | | #endif |
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| 92 | | |
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| 93 | | static inline char CAS(volatile uint32_t value, uint32_t newvalue, volatile void* addr) |
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| 94 | | { |
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| 95 | | register char ret; |
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| 96 | | __asm__ __volatile__ ( |
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| 97 | | "# CAS \n\t" |
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| 98 | | LOCK "cmpxchg %2, (%1) \n\t" |
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| 99 | | "sete %0 \n\t" |
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| 100 | | : "=a" (ret) |
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| 101 | | : "c" (addr), "d" (newvalue), "a" (value) |
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| 102 | | ); |
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| 103 | | return ret; |
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| 104 | | } |
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| 105 | | |
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| 106 | | #endif |
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| 107 | | |
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| 108 | | #endif |
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| 109 | | |
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| 110 | | #ifdef __linux__ |
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| 111 | | |
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| 112 | | #ifdef __PPC__ |
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| 113 | | |
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| 114 | | static inline int CAS(register uint32_t value, register uint32_t newvalue, register volatile void* addr) |
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| 115 | | { |
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| 116 | | register int result; |
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| 117 | | register uint32_t tmp; |
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| 118 | | asm volatile ( |
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| 119 | | "# CAS \n" |
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| 120 | | " lwarx %4, 0, %1 \n" // creates a reservation on addr |
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| 121 | | " cmpw %4, %2 \n" // test value at addr |
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| 122 | | " bne- 1f \n" |
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| 123 | | " sync \n" // synchronize instructions |
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| 124 | | " stwcx. %3, 0, %1 \n" // if the reservation is not altered |
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| 125 | | // stores the new value at addr |
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| 126 | | " bne- 1f \n" |
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| 127 | | " li %0, 1 \n" |
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| 128 | | " b 2f \n" |
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| 129 | | "1: \n" |
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| 130 | | " li %0, 0 \n" |
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| 131 | | "2: \n" |
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| 132 | | : "=r" (result) |
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| 133 | | : "r" (addr), "r" (value), "r" (newvalue), "r" (tmp) |
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| 134 | | ); |
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| 135 | | return result; |
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| 136 | | } |
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| 137 | | |
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| 138 | | #endif |
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| 139 | | |
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| 140 | | #if defined(__i386__) || defined(__x86_64__) |
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| 141 | | |
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| 142 | | #ifdef __SMP__ |
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| 143 | | # define LOCK "lock ; " |
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| 144 | | #else |
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| 145 | | # define LOCK "" |
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| 146 | | #endif |
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| 147 | | |
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| 148 | | static inline char CAS(volatile uint32_t value, uint32_t newvalue, volatile void* addr) |
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| 149 | | { |
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| 150 | | register char ret; |
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| 151 | | __asm__ __volatile__ ( |
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| 152 | | "# CAS \n\t" |
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| 153 | | LOCK "cmpxchg %2, (%1) \n\t" |
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| 154 | | "sete %0 \n\t" |
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| 155 | | : "=a" (ret) |
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| 156 | | : "c" (addr), "d" (newvalue), "a" (value) |
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| 157 | | ); |
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| 158 | | return ret; |
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| 159 | | } |
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| 160 | | |
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| 161 | | #endif |
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| 162 | | |
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| 163 | | #if !defined(__i386__) && !defined(__x86_64__) && !defined(__PPC__) |
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| 164 | | #warning using builtin gcc (version >4.1) atomic |
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