root/branches/streaming-rework/src/dice/dice_defines.h

Revision 433, 10.8 kB (checked in by pieterpalmers, 15 years ago)

- dice support

Line 
1 /* dice_defines.h
2  * Copyright (C) 2007 by Pieter Palmers
3  *
4  * This file is part of FreeBob.
5  *
6  * FreeBob is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  * FreeBob is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with FreeBob; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA.
19  */
20 #ifndef DICEDEFINES_H
21 #define DICEDEFINES_H
22
23 #define DICE_INVALID_OFFSET                  0xFFFFF00000000000ULL
24
25 /*
26  * This header is based upon the DICE II driver specification
27  * version 1.0.7.0 and:
28  *  dicedriverExtStatus.h,v 1.2 2006/09/27 20:35:45
29  *  dicedriverInterface.h,v 1.1.1.1 2006/08/10 20:00:57
30  *
31  */
32
33 // Register addresses & offsets
34 //  DICE_PRIVATE_SPACE registers
35 #define DICE_REGISTER_BASE                  0x0000FFFFE0000000ULL
36
37 #define DICE_REGISTER_GLOBAL_PAR_SPACE_OFF  0x0000
38 #define DICE_REGISTER_GLOBAL_PAR_SPACE_SZ   0x0004
39 #define DICE_REGISTER_TX_PAR_SPACE_OFF      0x0008
40 #define DICE_REGISTER_TX_PAR_SPACE_SZ       0x000C
41 #define DICE_REGISTER_RX_PAR_SPACE_OFF      0x0010
42 #define DICE_REGISTER_RX_PAR_SPACE_SZ       0x0014
43 #define DICE_REGISTER_UNUSED1_SPACE_OFF     0x0018
44 #define DICE_REGISTER_UNUSED1_SPACE_SZ      0x001C
45 #define DICE_REGISTER_UNUSED2_SPACE_OFF     0x0020
46 #define DICE_REGISTER_UNUSED2_SPACE_SZ      0x0024
47
48 //  GLOBAL_PAR_SPACE registers
49 #define DICE_REGISTER_GLOBAL_OWNER              0x0000
50 #define DICE_REGISTER_GLOBAL_NOTIFICATION       0x0008
51 #define DICE_REGISTER_GLOBAL_NICK_NAME          0x000C
52 #define DICE_REGISTER_GLOBAL_CLOCK_SELECT       0x004C
53 #define DICE_REGISTER_GLOBAL_ENABLE             0x0050
54 #define DICE_REGISTER_GLOBAL_STATUS             0x0054
55 #define DICE_REGISTER_GLOBAL_EXTENDED_STATUS    0x0058
56 #define DICE_REGISTER_GLOBAL_SAMPLE_RATE        0x005C
57 #define DICE_REGISTER_GLOBAL_VERSION            0x0060
58 #define DICE_REGISTER_GLOBAL_CLOCKCAPABILITIES  0x0064
59 #define DICE_REGISTER_GLOBAL_CLOCKSOURCENAMES   0x0068
60
61 //  TX_PAR_SPACE registers
62 #define DICE_REGISTER_TX_NB_TX                  0x0000
63 #define DICE_REGISTER_TX_SZ_TX                  0x0004
64
65 #define DICE_REGISTER_TX_ISOC_BASE              0x0008
66 #define DICE_REGISTER_TX_NB_AUDIO_BASE          0x000C
67 #define DICE_REGISTER_TX_MIDI_BASE              0x0010
68 #define DICE_REGISTER_TX_SPEED_BASE             0x0014
69 #define DICE_REGISTER_TX_NAMES_BASE             0x0018
70 #define DICE_REGISTER_TX_AC3_CAPABILITIES_BASE  0x0118
71 #define DICE_REGISTER_TX_AC3_ENABLE_BASE        0x011C
72
73 #define DICE_REGISTER_TX_PARAM(size, i, offset) \
74             ( ((i) * (size) * 4ULL) + (offset) )
75
76 //  RX_PAR_SPACE registers
77 #define DICE_REGISTER_RX_NB_RX                  0x0000
78 #define DICE_REGISTER_RX_SZ_RX                  0x0004
79
80 #define DICE_REGISTER_RX_ISOC_BASE              0x0008
81 #define DICE_REGISTER_RX_SEQ_START_BASE         0x000C
82 #define DICE_REGISTER_RX_NB_AUDIO_BASE          0x0010
83 #define DICE_REGISTER_RX_MIDI_BASE              0x0014
84 #define DICE_REGISTER_RX_NAMES_BASE             0x0018
85 #define DICE_REGISTER_RX_AC3_CAPABILITIES_BASE  0x0118
86 #define DICE_REGISTER_RX_AC3_ENABLE_BASE        0x011C
87
88 #define DICE_REGISTER_RX_PARAM(size, i, offset) \
89             ( ((i) * (size) * 4ULL) + (offset) )
90
91 // Register Bitfields
92 //  GLOBAL_PAR_SPACE registers
93 //   OWNER register defines
94 #define DICE_OWNER_NO_OWNER 0xFFFF000000000000LLU
95
96 //   NOTIFICATION register defines
97 #define DICE_NOTIFY_RX_CFG_CHG_BIT      (1UL << 0)
98 #define DICE_NOTIFY_TX_CFG_CHG_BIT      (1UL << 1)
99 #define DICE_NOTIFY_DUP_ISOC_BIT        (1UL << 2)
100 #define DICE_NOTIFY_BW_ERR_BIT          (1UL << 3)
101 #define DICE_NOTIFY_LOCK_CHG_BIT        (1UL << 4)
102 #define DICE_NOTIFY_CLOCK_ACCEPTED      (1UL << 5)
103
104 // bits 6..15 are RESERVED
105
106 // FIXME:
107 // diceDriverInterface.h defines the following bitfield
108 // that is undocumented by spec 1.0.7.0
109 #define DICE_INTERFACE_CHG_BIT          (1UL << 6)
110
111 // FIXME:
112 // The spec 1.0.7.0 defines these as USER notifications
113 // however diceDriverInterface.h defines these as
114 // 'reserved bits for future system wide use'.
115 #define DICE_NOTIFY_RESERVED1           (1UL << 16)
116 #define DICE_NOTIFY_RESERVED2           (1UL << 17)
117 #define DICE_NOTIFY_RESERVED3           (1UL << 18)
118 #define DICE_NOTIFY_RESERVED4           (1UL << 19)
119
120 // FIXME:
121 // The spec 1.0.7.0 does not specify anything about
122 // the format of the user messages
123 // however diceDriverInterface.h indicates:
124 // "When DD_NOTIFY_MESSAGE is set DD_NOTIFY_USER4 through
125 //  DD_NOTIFY_USER11 are defined as an 8 bit message so
126 //  you can have 256 seperate messages (like gray encoder
127 //  movements)."
128
129 #define DICE_NOTIFY_MESSAGE             (1UL << 20)
130 #define DICE_NOTIFY_USER1               (1UL << 21)
131 #define DICE_NOTIFY_USER2               (1UL << 22)
132 #define DICE_NOTIFY_USER3               (1UL << 23)
133 #define DICE_NOTIFY_USER4               (1UL << 24)
134 #define DICE_NOTIFY_USER5               (1UL << 25)
135 #define DICE_NOTIFY_USER6               (1UL << 26)
136 #define DICE_NOTIFY_USER7               (1UL << 27)
137 #define DICE_NOTIFY_USER8               (1UL << 28)
138 #define DICE_NOTIFY_USER9               (1UL << 29)
139 #define DICE_NOTIFY_USER10              (1UL << 30)
140 #define DICE_NOTIFY_USER11              (1UL << 31)
141
142 #define DICE_NOTIFY_USER_IS_MESSAGE(x) \
143                 ( ((x) & DICE_NOTIFY_MESSAGE) != 0 )
144
145 #define DICE_NOTIFY_USER_GET_MESSAGE(x) \
146                 ( ((x) >> 24 ) & 0xFF )
147                
148 //   NICK_NAME register
149
150 // NOTE: in bytes
151 #define DICE_NICK_NAME_SIZE             64
152
153 //   CLOCK_SELECT register
154 // Clock sources supported
155 #define DICE_CLOCKSOURCE_AES1           0x00
156 #define DICE_CLOCKSOURCE_AES2           0x01
157 #define DICE_CLOCKSOURCE_AES3           0x02
158 #define DICE_CLOCKSOURCE_AES4           0x03
159 #define DICE_CLOCKSOURCE_AES_ANY        0x04
160 #define DICE_CLOCKSOURCE_ADAT           0x05
161 #define DICE_CLOCKSOURCE_TDIF           0x06
162 #define DICE_CLOCKSOURCE_WC             0x07
163 #define DICE_CLOCKSOURCE_ARX1           0x08
164 #define DICE_CLOCKSOURCE_ARX2           0x09
165 #define DICE_CLOCKSOURCE_ARX3           0x0A
166 #define DICE_CLOCKSOURCE_ARX4           0x0B
167 #define DICE_CLOCKSOURCE_INTERNAL       0x0C
168
169 #define DICE_CLOCKSOURCE_MASK           0x0000FFFFLU
170 #define DICE_GET_CLOCKSOURCE(reg)       (((reg) & DICE_CLOCKSOURCE_MASK))
171 #define DICE_SET_CLOCKSOURCE(reg,clk)   (((reg) & ~DICE_CLOCKSOURCE_MASK) | ((clk) & DICE_CLOCKSOURCE_MASK))
172
173 // Supported rates
174 #define DICE_RATE_32K                   0x00
175 #define DICE_RATE_44K1                  0x01
176 #define DICE_RATE_48K                   0x02
177 #define DICE_RATE_88K2                  0x03
178 #define DICE_RATE_96K                   0x04
179 #define DICE_RATE_176K4                 0x05
180 #define DICE_RATE_192K                  0x06
181 #define DICE_RATE_ANY_LOW               0x07
182 #define DICE_RATE_ANY_MID               0x08
183 #define DICE_RATE_ANY_HIGH              0x09
184 #define DICE_RATE_NONE                  0x0A
185
186 #define DICE_RATE_MASK                  0xFFFF0000LU
187 #define DICE_GET_RATE(reg)              (((reg) & DICE_RATE_MASK) >> 8)
188 #define DICE_SET_RATE(reg,rate)         (((reg) & ~DICE_RATE_MASK) | (((rate) << 8) & DICE_RATE_MASK) )
189
190 //   ENABLE register
191 #define DICE_ISOSTREAMING_ENABLE        (1UL << 0)
192 #define DICE_ISOSTREAMING_DISABLE       (0)
193
194
195 //   CLOCK_STATUS register
196 #define DICE_STATUS_SOURCE_LOCKED       (1UL << 0)
197 #define DICE_STATUS_RATE_CONFLICT       (1UL << 1)
198
199 #define DICE_STATUS_GET_NOMINAL_RATE(x) ( ((x) >> 8 ) & 0xFF )
200
201 //   EXTENDED_STATUS register
202 #define DICE_EXT_STATUS_AES0_LOCKED         (1UL << 0)
203 #define DICE_EXT_STATUS_AES1_LOCKED         (1UL << 1)
204 #define DICE_EXT_STATUS_AES2_LOCKED         (1UL << 2)
205 #define DICE_EXT_STATUS_AES3_LOCKED         (1UL << 3)
206 #define DICE_EXT_STATUS_ADAT_LOCKED         (1UL << 4)
207 #define DICE_EXT_STATUS_TDIF_LOCKED         (1UL << 5)
208 #define DICE_EXT_STATUS_ARX1_LOCKED         (1UL << 6)
209 #define DICE_EXT_STATUS_ARX2_LOCKED         (1UL << 7)
210 #define DICE_EXT_STATUS_ARX3_LOCKED         (1UL << 8)
211 #define DICE_EXT_STATUS_ARX4_LOCKED         (1UL << 9)
212
213 // FIXME: this one is missing in dicedriverExtStatus.h
214 #define DICE_EXT_STATUS_WORDCLOCK_LOCKED    (1UL << 10)
215
216 #define DICE_EXT_STATUS_AES0_SLIP           (1UL << 16)
217 #define DICE_EXT_STATUS_AES1_SLIP           (1UL << 17)
218 #define DICE_EXT_STATUS_AES2_SLIP           (1UL << 18)
219 #define DICE_EXT_STATUS_AES3_SLIP           (1UL << 19)
220 #define DICE_EXT_STATUS_ADAT_SLIP           (1UL << 20)
221 #define DICE_EXT_STATUS_TDIF_SLIP           (1UL << 21)
222 #define DICE_EXT_STATUS_ARX1_SLIP           (1UL << 22)
223 #define DICE_EXT_STATUS_ARX2_SLIP           (1UL << 23)
224 #define DICE_EXT_STATUS_ARX3_SLIP           (1UL << 24)
225 #define DICE_EXT_STATUS_ARX4_SLIP           (1UL << 25)
226
227 //   SAMPLE_RATE register
228 // nothing here
229
230 //   VERSION register
231 #define DICE_DRIVER_SPEC_VERSION_NUMBER_GET(x,y) \
232             ( ( (x) >> (y)) & 0xFF )
233
234 #define DICE_DRIVER_SPEC_VERSION_NUMBER_GET_A(x) \
235             DICE_DRIVER_SPEC_VERSION_NUMBER_GET(x,24)
236
237 #define DICE_DRIVER_SPEC_VERSION_NUMBER_GET_B(x) \
238             DICE_DRIVER_SPEC_VERSION_NUMBER_GET(x,16)
239
240 #define DICE_DRIVER_SPEC_VERSION_NUMBER_GET_C(x) \
241             DICE_DRIVER_SPEC_VERSION_NUMBER_GET(x,8)
242
243 #define DICE_DRIVER_SPEC_VERSION_NUMBER_GET_D(x) \
244             DICE_DRIVER_SPEC_VERSION_NUMBER_GET(x,0)
245
246 //   CLOCKCAPABILITIES register
247 #define DICE_CLOCKCAP_RATE_32K          (1UL << 0)
248 #define DICE_CLOCKCAP_RATE_44K1         (1UL << 1)
249 #define DICE_CLOCKCAP_RATE_48K          (1UL << 2)
250 #define DICE_CLOCKCAP_RATE_88K2         (1UL << 3)
251 #define DICE_CLOCKCAP_RATE_96K          (1UL << 4)
252 #define DICE_CLOCKCAP_RATE_176K4        (1UL << 5)
253 #define DICE_CLOCKCAP_RATE_192K         (1UL << 6)
254 #define DICE_CLOCKCAP_SOURCE_AES1       (1UL << 16)
255 #define DICE_CLOCKCAP_SOURCE_AES2       (1UL << 17)
256 #define DICE_CLOCKCAP_SOURCE_AES3       (1UL << 18)
257 #define DICE_CLOCKCAP_SOURCE_AES4       (1UL << 19)
258 #define DICE_CLOCKCAP_SOURCE_AES_ANY    (1UL << 20)
259 #define DICE_CLOCKCAP_SOURCE_ADAT       (1UL << 21)
260 #define DICE_CLOCKCAP_SOURCE_TDIF       (1UL << 22)
261 #define DICE_CLOCKCAP_SOURCE_WORDCLOCK  (1UL << 23)
262 #define DICE_CLOCKCAP_SOURCE_ARX1       (1UL << 24)
263 #define DICE_CLOCKCAP_SOURCE_ARX2       (1UL << 25)
264 #define DICE_CLOCKCAP_SOURCE_ARX3       (1UL << 26)
265 #define DICE_CLOCKCAP_SOURCE_ARX4       (1UL << 27)
266 #define DICE_CLOCKCAP_SOURCE_INTERNAL   (1UL << 28)
267
268 //   CLOCKSOURCENAMES
269 // note: in bytes
270 #define DICE_CLOCKSOURCENAMES_SIZE      256
271
272 //  TX_PAR_SPACE registers
273 // note: in bytes
274 #define DICE_TX_NAMES_SIZE              256
275
276 //  RX_PAR_SPACE registers
277 // note: in bytes
278 #define DICE_RX_NAMES_SIZE              256
279
280 #endif // DICEDEFINES_H
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