144 | | Streaming start parameter register (0x20000001c): |
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145 | | |
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146 | | This register comprises the 3 quadlets starting at address 0x20000001c. The |
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147 | | first quadlet contains the sample rate in Hz. The second and third quadlets |
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148 | | were always observed to take the values 0x0000e000 and 0x0000001c |
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149 | | respectively. |
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| 144 | Device (streaming) initialisation register (FF800: 0x20000001c, FF400: CBA) |
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| 145 | |
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| 146 | This register comprises the 3 quadlets starting at address 0x20000001c on |
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| 147 | the FF800 and the CBA on the FF400. The first quadlet contains the sample |
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| 148 | rate in Hz. The second quadlet is mapped as follows: |
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| 149 | bits 31-11 = number of audio channels |
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| 150 | bits 10-0 = iso tx channel (PC to interface) |
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| 151 | In all local tests with a FF800 the value of this quadlet was always equal |
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| 152 | to 0x0000e000 (28 channels, PC transmits on iso channel 0). |
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| 153 | |
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| 154 | The third quadlet is mapped as follows. |
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| 155 | bits 10-0 = number of audio channels |
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| 156 | bit 11 = speed flag; set to 1 if firewire bus is at 800 Mbps |
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| 157 | In local tests with a FF800 the value of this register was always 0x0000001c |
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| 158 | (28 channels, 400 Mbps firewire bus). |
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155 | | Streaming start ready register (0x200000028): |
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156 | | |
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157 | | A value of 0x1c000000 is written to this register after the streaming start |
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158 | | parameter register has been written to. |
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159 | | |
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160 | | Streaming channel setup register (0x801c0000): |
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161 | | |
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162 | | After writing to the streaming start ready register, 0x70 bytes (28 |
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163 | | quadlets) are written starting at 0x801c0000. Each quadlet appears to |
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164 | | represent one channel on the Fireface800. On closing down streaming each |
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165 | | quadlet is set to 1, while during startup some values are set to zero |
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166 | | (although they are probably not the channels being opened for playback, more |
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167 | | testing is needed). Irrespective of the setting of these registers it |
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168 | | appears that data for all channels is always sent to/from the Fireface-800. |
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169 | | |
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170 | | This register is also read during streaming setup but the returned value |
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171 | | bears little relationship to that which is written to it. The purpose of |
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172 | | this read and/or the meaning of the returned value is as yet unknown. |
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173 | | |
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174 | | Streaming end register (0x200000034): |
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175 | | |
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176 | | 3 zero quadlets are written starting at address 0x200000034 to stop |
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177 | | streaming. |
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| 164 | Device (streaming) start register (FF800: 0x200000028, FF400: CBA+0x1c): |
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| 165 | |
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| 166 | The start of streaming differs between the FF800 in more than just the |
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| 167 | address of the relevant register. On the FF800 this register is mapped |
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| 168 | as follows: |
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| 169 | bits 10-0 = number of audio channels |
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| 170 | bit 11 = bus speed flag; set to 1 if firewire bus is at 800 Mbps |
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| 171 | On a FF400 the register is as follows: |
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| 172 | bits 4-0 = number of audio channels |
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| 173 | bits 9-5 = iso tx channel (PC to interface) |
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| 174 | During initial testing with a FF800 the value of this register was always |
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| 175 | 0x0000001c (28 audio channels, PC tx on iso channel 0). |
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| 176 | |
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| 177 | Channel mute setup register (write to 0x801c0000): |
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| 178 | |
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| 179 | After writing to the streaming start register, 0x70 bytes (28 quadlets) are |
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| 180 | written starting at 0x801c0000. Each quadlet represents one channel on the |
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| 181 | Fireface800. A value of 1 mutes the respective channel - indeed on closing |
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| 182 | down streaming each quadlet is set to 1. During startup some values are set |
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| 183 | to zero - the ones set to zero may be determined by the channels which have |
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| 184 | active software data sources although this is yet to be confirmed with more |
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| 185 | testing. Irrespective of the setting of these registers it appears that |
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| 186 | data for all channels is always sent to/from the Fireface-800. |
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| 187 | |
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| 188 | Note that when register 0x801c0000 is read it functions as the device status |
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| 189 | register. It is read during streaming setup, but obviously it bears no |
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| 190 | relationship to the channel mute status. |
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| 191 | |
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| 192 | Streaming end register (FF800: 0x200000034, FF400: CBA+0x4): |
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| 193 | |
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| 194 | On the FF800, streaming is stopped by writing 3 zeroed quadlets to |
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| 195 | consecutive registers starting at address 0x200000034. For the FF400 one |
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| 196 | writes 3 zeroed quadlets to consecutive registers from CBA+0x4, followed |
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| 197 | by a 0x00000001 to CBA+0x10 (making a 4-quadlet write in total). |
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