Changeset 1532

03/29/09 18:00:32 (15 years ago)

RME: documentation updates
RME: clean up some compile warnings
RME: introduce new defines for future work



  • trunk/libffado/doc/rme_notes/rme_config_register_map.txt

    r1519 r1532  
    4 Version: 0.5 
     4Version: 0.6 
    55Author: Jonathan Woithe 
    6 Date: 15 March 2009 
     6Date: 27 March 2009 
    1313FF800 = Fireface-800 
    1414FF400 = Fireface-400 
     16Multi-byte values sent to/from the Fireface are generally little endian. 
    144 Waiting for device flash 
    145 ------------------------ 
     146Interfacing to device flash 
    147149To preserve the device's settings across power cycles the settings are 
    149151initialisation to ensure the driver's status agrees with that of the device. 
     153There are several classes of things stored in flash: operational settings, 
     154volumes (ie: the mixer status) and configuration/firmware.  Device settings 
     155start at address 0x3000f0000 on the FF800 and 0x00060000 on the FF400. 
     157Mixer (volume) data starts at 0x3000e0000 on the FF800 and 0x00060000 on the 
     158FF400.  Mixer volumes are written in 64-quadlet (256-byte) blocks, one per 
     159hardware channel.  There are 28 hardware channels for the FF800 and 18 for 
     160the FF400. 
     162There are several control groups in the mixer: 
     163  0xe0000 (FF800): "mixer shadow", FF800 only, meaning unclear 
     164  0xe2000 (FF800) / 0x70000 (FF400), 0x0800 bytes: 16-bit volume array 
     165  0xe2800 (FF800) / 0x70800 (FF400), 0x0800 bytes: 16-bit pan array 
     166  0xe3000 (FF800) / 0x71000 (FF400), 0x0040 bytes: 16-bit "vol3" array +  
     167    "enable MIDI" + "submix" + zero padding to 64 bytes 
     168The third row are the "hardware output volumes". 
     170The meaning of the "mixer shadow" section of the mixer flash is not 
     171understood at present. 
     174Reading the flash 
     176For the FF800 the entire buffer is read directly from flash as a single block. 
     177Polling for "device not busy" should commence after a wait of 5 ms. 
     179For the FF400, the buffer is read in 32-quadlet sub-blocks.  A partial block 
     180is read at the end if the total buffer size is not a multiple of 
     18132-quadlets.  To read a sub-block, the address is placed in register 
     1820x80100288 and the sub-block size (in bytes) in 0x8010028c.  A 0x02 is 
     183then written to CBA+(8*4) to initiate the read.  Polling for "device not 
     184busy" should commence after a wait of 2 ms. 
     187Writing the flash 
     189For the FF800, the entire buffer is written to flash as a single block. 
     190Polling for "device not busy" should commence after a wait of 5 ms. 
     192For the FF400, the buffer is written in 32-quadlet (128-byte) sub-blocks via 
     193a bounce buffer.  If the final sub-block is not 32-quadlets the write is only 
     194as big as the sub-block (that is, no padding takes place).  The sub-block 
     195data to be written is sent to register 0x80100290.  The 2-quadlet register 
     196at 0x80100288 is set with the flash address to write the block to and the 
     197size (in bytes) of the data block.  Finally, a 0x1 is written to CBA+(8*4) 
     198to initiate the write.  Polling for "device not busy" should commence after 
     199a wait of 2 ms. 
     202Erasing the flash 
     204The flash is divided into sections and it is possible to erase each section 
     205separately.  Therefore one only has to erase section of interest when 
     206changing something. 
     208On the FF400, erasure is controlled by writing a special magic number to 
     209the the flash erase control register (CBA+8*4): 
     210  Erase volume: write 0xe 
     211  Erase settings: write 0xd 
     212  Erase configuration (firmware): write 0xc 
     214On the FF800, erasing is controlled by writing 0 to the applicable register: 
     215  Erase volume: register is 0x3fffffff4 
     216  Erase settings: register is 0x3fffffff0 
     217  Erase firmware: register is 0x3fffffff8 
     218  Erase configuration: register is 0x3fffffffc 
     220It's not clear what the distinction between "configuration" and "firmware" 
     221is.  The FF400 appears to only support "configuration" but treats this as 
     222"firmware".  The FF800 supports both as distinct options. 
     224After issuing the erase command one should wait for 500 ms before polling 
     225the device for the "not busy" status. 
     228Waiting for flash 
    151230When interacting with the device's flash memory one must wait for the 
    152231completion of an operation before attempting another.  The location of the 
    163242point in polling the device busy flag until at least this much time has 
     246Device settings format 
     249The device settings are stored in flash as an array of 32 bit unsigned 
     250integers.  These are: 
     251  - Device ID 
     252  - Device revision 
     253  - ASIO latency 
     254  - Samples per frame 
     255  SPDIF input mode (0=coax?, 1=optical?) 
     256  SPDIF output emphasis active 
     257  SPDIF output is "professional" (ie: AES/EBU) 
     258  Clock mode (0=master?, 1=autosync?) 
     259  SPDIF output is non-audio (eg: AC3 passthrough) 
     260  Sync reference 
     261  SPDIF output mode (0=coax?, 1=optical?) 
     262  - Check input 
     263  - Status 
     264  - Register[4] 
     265  - Iso receive channel 
     266  - Iso transmit channel 
     267  - Timecode 
     268  - Number of devices 
     269  - TMS 
     270  - Speed 
     271  - Channels available (high) 
     272  - Channels available (low) 
     273  Limit bandwidth setting 
     274  - Bandwidth allocated 
     275  - Stop on dropout 
     276  Input level  
     277  Output level 
     278  Mic level [0] - FF400:Phoneslevel-1 / F800:AnalogInput[1]* ??? 
     279  Mic level [1] - AnalogInput[2] ??? 
     280  Mic phantom power [4] 
     281  Instrument - AnalogInput[0]-1 ??? 
     282  Filter (aka speaker emulation) 
     283  Fuzz (aka drive) 
     284  Sync align 
     285  - Device index 
     286  - Advanced dialog 
     287  Sample rate 
     288  - Interleaved 
     289  - Sn 
     290  Word clock single speed 
     291  - Number of channels 
     292  - Dropped samples 
     293  p12db_an[0] - Limiter==0&&AnalogInput[0]==2*: 1 else 0 ??? 
     294  - p12db_an[1-9] 
     296"-" = elements not used 
    193325Device (streaming) start register (FF800: 0x200000028, FF400: CBA+0x1c): 
    195 The start of streaming differs between the FF800 in more than just the 
    196 address of the relevant register.  On the FF800 this register is mapped 
     327The start of streaming differs between the FF400 and FF800 in more than just 
     328the address of the relevant register.  On the FF800 this register is mapped 
    197329as follows: 
    198330  bits 10-0 = number of audio channels 
  • trunk/libffado/src/rme/rme_avdevice.cpp

    r1336 r1532  
    4747static VendorModelEntry supportedDeviceList[] = 
    49     {FW_VENDORID_RME, 0x0001, RME_MODEL_FIREFACE800, "RME", "Fireface-800"}, 
    50     {FW_VENDORID_RME, 0x0002, RME_MODEL_FIREFACE400, "RME", "Fireface-400"}, 
     49//  {vendor_id, unit_version, model identifier, vendor name, model name,} 
     50    {FW_VENDORID_RME, 0x0001, RME_MODEL_FIREFACE800, "RME", "Fireface-800",}, 
     51    {FW_VENDORID_RME, 0x0002, RME_MODEL_FIREFACE400, "RME", "Fireface-400",}, 
    276277unsigned int  
    277 RmeDevice::readRegister(unsigned int reg) { 
     278RmeDevice::readRegister(fb_nodeaddr_t reg) { 
    279280    quadlet_t quadlet; 
    288289signed int 
    289 RmeDevice::writeRegister(unsigned int reg, quadlet_t data) { 
     290RmeDevice::writeRegister(fb_nodeaddr_t reg, quadlet_t data) { 
    291292    unsigned int err = 0; 
  • trunk/libffado/src/rme/rme_avdevice.h

    r1336 r1532  
    5555    unsigned int unit_version; 
    5656    enum ERmeModel model; 
    57     char *vendor_name; 
    58     char *model_name; 
     57    const char *vendor_name; 
     58    const char *model_name; 
    9292    virtual bool stopStreamByIndex(int i); 
    94     unsigned int readRegister(unsigned int reg); 
    95     signed int writeRegister(unsigned int reg, quadlet_t data); 
     94    unsigned int readRegister(fb_nodeaddr_t reg); 
     95    signed int writeRegister(fb_nodeaddr_t reg, quadlet_t data);