Changeset 1534

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Timestamp:
04/05/09 17:36:45 (15 years ago)
Author:
jwoithe
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RME: more low-level infrastructure development and experimentation

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  • trunk/libffado/doc/rme_notes/rme_config_register_map.txt

    r1533 r1534  
    22============================================ 
    33 
    4 Version: 0.6 
     4Version: 0.7 
    55Author: Jonathan Woithe 
    6 Date: 27 March 2009 
     6Date: 4 April 2009 
    77 
    88 
    …… 
    1414FF400 = Fireface-400 
    1515 
    16 Multi-byte values sent to/from the Fireface are generally little endian. 
     16Multi-byte values sent to/from the Fireface are generally little endian - 
     17that is, the device interprets quadlets in asynchronous packets as little 
     18endian even though the bus definition is big-endian.  If writing a driver 
     19for use on a little endian machine, this means that a lack of byte swapping 
     20(to account for the bus endianness standard) will cause bit 0 on the host to 
     21be bit 0 on the device. 
     22 
     23FFADO however adheres to the bus standards and byteswaps on little endian 
     24machines.  Under FFADO therefore, bit 0 on the host will in fact be read by 
     25the device as the least significant bit in the most significant byte. 
     26 
     27The bit maps in this document regarding the configuration registers are 
     28written from the device's point of view. 
     29 
     30Curiously enough, audio data appears to be send on the bus in big endian 
     31format (although this is to be confirmed). 
    1732 
    1833 
    …… 
    143158  bit 0: Clock mode: 0 = Master, 1 = Autosync 
    144159 
     160On the FF400, writing to these registers with valid values for the first 
     161time after power up has the side effect of extingishing the "Host" LED. 
     162 
    145163 
    146164Interfacing to device flash 
    …… 
    172190 
    173191 
    174 Reading the flash 
     192Reading blocks from the flash (flash command 0x2) 
    175193 
    176194For the FF800 the entire buffer is read directly from flash as a single block. 
    …… 
    1822000x80100288 and the sub-block size (in bytes) in 0x8010028c.  A 0x02 is 
    183201then written to CBA+(8*4) to initiate the read.  Polling for "device not 
    184 busy" should commence after a wait of 2 ms. 
    185  
    186  
    187 Writing the flash 
     202busy" should commence after a wait of 2 ms.  Once not busy the data is 
     203available for reading from 0x80100290. 
     204 
     205 
     206Writing blocks to the flash (flash command 1) 
    188207 
    189208For the FF800, the entire buffer is written to flash as a single block. 
    …… 
    200219 
    201220 
     221Getting other data from flash 
     222 
     223There are a few other commands issued to the flash memory system for 
     224obtaining data about the connected interface: 
     225 
     226 * Device revision 
     227 
     228   On the FF800 this is read directly from register 0x200000100. 
     229 
     230   On the FF400, 0xf is written to CBA+(8*4).  Poll for "not busy" after a 
     231   wait of 2ms.  Once not busy the revision is read from register 
     232   0x80100290. 
     233 
     234 
    202235Erasing the flash 
    203236 
    …… 
    247280---------------------- 
    248281 
    249 The device settings are stored in flash as an array of 32 bit unsigned 
     282The device settings are stored in flash as an array of 44 32-bit unsigned 
    250283integers.  These are: 
    251   - Device ID 
    252   - Device revision 
    253   - ASIO latency 
    254   - Samples per frame 
     284  0  - Device ID 
     285  1  - Device revision 
     286  2  - ASIO latency 
     287  3  - Samples per frame 
    255288  SPDIF input mode (0=coax?, 1=optical?) 
    256289  SPDIF output emphasis active 
    …… 
    269302  - TMS 
    270303  - Speed 
    271   - Channels available (high) 
     304 20 - Channels available (high) 
    272305  - Channels available (low) 
    273306  Limit bandwidth setting 
    274307  - Bandwidth allocated 
    275308  - Stop on dropout 
    276   Input level  
     309 25 Input level  
    277310  Output level 
    278   Mic level [0] - FF400:Phoneslevel-1 / F800:AnalogInput[1]* ??? 
    279   Mic level [1] - AnalogInput[2] ??? 
    280   Mic phantom power [4] 
    281   Instrument - AnalogInput[0]-1 ??? 
     311 27 Mic level [0] - FF400:Phoneslevel-1 / F800:AnalogInput[1]* ??? 
     312 28 Mic level [1] - AnalogInput[2] ??? 
     313 29 Mic phantom power [4] 
     314 33 Instrument - AnalogInput[0]-1 ??? 
    282315  Filter (aka speaker emulation) 
    283316  Fuzz (aka drive) 
    284317  Sync align 
    285   - Device index 
     318 37 - Device index 
    286319  - Advanced dialog 
    287   Sample rate 
    288   - Interleaved 
    289   - Sn 
    290   Word clock single speed 
    291   - Number of channels 
    292   - Dropped samples 
    293   p12db_an[0] - Limiter==0&&AnalogInput[0]==2*: 1 else 0 ??? 
    294   - p12db_an[1-9] 
     320 39 Sample rate 
     321 40 - Interleaved 
     322 41 - Sn 
     323 42 Word clock single speed 
     324 43 - Number of channels 
     325 44 - Dropped samples 
     326 45 p12db_an[0] - Limiter==0&&AnalogInput[0]==2*: 1 else 0 ??? 
     327 46 - p12db_an[1-9] 
    295328 
    296329"-" = elements not used 
    297330 
     331Total size: 55 quadlets 
    298332 
    299333Streaming control registers 
    …… 
    4755090x200000324.  Note that this register address goes beyond the 32-bit 
    476510boundary. 
     511 
     512On the FF400 the host LED is controlled internally.  On power up it is 
     513turned on.  Once the host PC programs the configuration registers with 
     514valid values the host LED will automatically turn off. 

  • trunk/libffado/src/rme/fireface_def.h

    r1533 r1534  
    3737 
    3838/* The Command Buffer Address (CBA) is different for the two interfaces */ 
    39 #define RME_FF400_CMD_BUFFER    0xfc88f000 
    40 #define RME_FF800_CMD_BUFFER    0x80100500 
     39#define RME_FF400_CMD_BUFFER    0x80100500 
     40#define RME_FF800_CMD_BUFFER    0xfc88f000 
    4141 
    4242/* Offsets for registers at fixed offsets from the device's command buffer address */ 
    43 #define RME_FF_SRATE_CTRL_OFS   (0*4) 
    44 #define RME_FF_CONF1_OFS        (5*4) 
    45 #define RME_FF_CONF2_OFS        (6*4) 
    46 #define RME_FF_CONF3_OFS        (7*4) 
    47 #define RME_FF400_FLASH_CMD_OFS (8*4) 
     43#define RME_FF_SRATE_CTRL_OFS     (0*4) 
     44#define RME_FF_CONF1_OFS          (5*4) 
     45#define RME_FF_CONF2_OFS          (6*4) 
     46#define RME_FF_CONF3_OFS          (7*4) 
     47#define RME_FF400_FLASH_CMD_OFS   (8*4)       // Write only 
     48#define RME_FF400_FLASH_STAT_OFS  (8*4)       // Read only 
    4849 
    4950/* General register definitions */ 
     51#define RME_FF400_CONF_REG           (RME_FF400_CMD_BUFFER + RME_FF_CONF1_OFS) 
     52#define RME_FF800_CONF_REG           (RME_FF800_CMD_BUFFER + RME_FF_CONF1_OFS) 
     53 
    5054#define RME_FF400_STREAM_START_REG   (RME_FF400_CMD_BUFFER + 0x001c)  
    5155#define RME_FF800_STREAM_START_REG  0x200000028LL 
    …… 
    5357#define RME_FF800_STREAM_END_REG    0x200000034LL                     // 3 quadlets wide 
    5458 
    55 #define RME_FF_HOST_LED_REG         0x200000324LL 
     59#define RME_FF800_HOST_LED_REG      0x200000324LL 
    5660 
    57 #define RME_FF_CHANNEL_MUTE_MASK     0x801c0000    /* Write only */ 
    58 #define RME_FF_STATUS_REG            0x801c0000    /* Read only */ 
     61#define RME_FF800_REVISION_REG      0x200000100LL 
     62 
     63#define RME_FF_CHANNEL_MUTE_MASK     0x801c0000    // Write only 
     64#define RME_FF_STATUS_REG0           0x801c0000    // Read only 
     65#define RME_FF_STATUS_REG1           0x801c0004    // Read only 
    5966 
    6067/* Addresses of various blocks in memory-mapped flash */ 
    …… 
    7279#define RME_FF400_FLASH_BLOCK_ADDR_REG      0x80100288 
    7380#define RME_FF400_FLASH_BLOCK_SIZE_REG      0x8010028c 
    74 #define RME_FF400_FLASH_CMD_REG             (RME_FF400_CMD_BUFFER+RME_FF400_FLASH_CMD_OFS) 
     81#define RME_FF400_FLASH_CMD_REG             (RME_FF400_CMD_BUFFER + RME_FF400_FLASH_CMD_OFS) 
     82#define RME_FF400_FLASH_STAT_REG            (RME_FF400_CMD_BUFFER + RME_FF400_FLASH_STAT_OFS) 
    7583#define RME_FF400_FLASH_WRITE_BUFFER        0x80100290 
     84#define RME_FF400_FLASH_READ_BUFFER         0x80100290 
    7685 
    7786/* Erase control registers on the FF800 */ 
    …… 
    8291 
    8392/* Flags and special values */ 
    84 #define RME_FF400_FLASH_CMD_WRITE           0x1 
    85 #define RME_FF400_FLASH_CMD_READ            0x2 
    86 #define RME_FF400_FLASH_CMD_ERASE_VOLUME    0xe 
    87 #define RME_FF400_FLASH_CMD_ERASE_SETTINGS  0xd 
    88 #define RME_FF400_FLASH_CMD_ERASE_CONFIG    0xc 
     93#define RME_FF400_FLASH_CMD_WRITE           0x01000000 
     94#define RME_FF400_FLASH_CMD_READ            0x02000000 
     95#define RME_FF400_FLASH_CMD_ERASE_VOLUME    0x0e000000 
     96#define RME_FF400_FLASH_CMD_ERASE_SETTINGS  0x0d000000 
     97#define RME_FF400_FLASH_CMD_ERASE_CONFIG    0x0c000000 
     98#define RME_FF400_FLASH_CMD_GET_REVISION    0x0f000000 
     99 
     100 
     101/* Defines for components of the control register */ 
     102/* FIXME: flesh this out once the details of how this gets used have been  
     103 * finalised 
     104 */ 
     105#define CR_FREQ0      0x02000000 
     106#define CR_FREQ1      0x04000000 
     107#define CR_DS         0x08000000 
     108#define CR_QS         0x10000000 
     109 
    89110 
    90111#endif 

  • trunk/libffado/src/rme/rme_avdevice.cpp

    r1533 r1534  
    139139    } 
    140140 
    141     if (m_model != NULL) { 
    142         debugOutput( DEBUG_LEVEL_VERBOSE, "found %s %s\n", 
    143                 m_model->vendor_name, m_model->model_name); 
    144         return true; 
    145     } 
    146  
    147     return false; 
     141    if (m_model == NULL) 
     142        return false; 
     143 
     144    debugOutput( DEBUG_LEVEL_VERBOSE, "found %s %s\n", 
     145        m_model->vendor_name, m_model->model_name); 
     146 
     147    init_hardware(); 
     148read_device_settings(); 
     149 
     150    return true; 
    148151} 
    149152 
    …… 
    311314} 
    312315 
     316signed int  
     317RmeDevice::readBlock(fb_nodeaddr_t reg, quadlet_t *buf, unsigned int n_quads) { 
     318 
     319    unsigned int i; 
     320 
     321    if (get1394Service().read(0xffc0 | getNodeId(), reg, n_quads, buf) <= 0) { 
     322        debugError("Error doing RME block read of %d quadlets from register 0x%06x\n", 
     323            n_quads, reg); 
     324        return -1; 
     325    } 
     326    for (i=0; i<n_quads; i++) { 
     327       buf[i] = CondSwapFromBus32(buf[i]); 
     328    } 
     329 
     330    return 0; 
     331} 
     332 
    313333signed int 
    314334RmeDevice::writeRegister(fb_nodeaddr_t reg, quadlet_t data) { 
    …… 
    320340        debugError("Error doing RME write to register 0x%06x\n",reg); 
    321341    } 
    322 //    SleepRelativeUsec(100); 
    323342    return (err==0)?0:-1; 
    324343} 
     344 
     345signed int 
     346RmeDevice::writeBlock(fb_nodeaddr_t reg, quadlet_t *data, unsigned int n_quads) { 
     347// 
     348// Write a block of data to the device starting at address "reg".  Note that 
     349// the conditional byteswap is done "in place" on data, so the contents of 
     350// data may be modified by calling this function. 
     351// 
     352    unsigned int err = 0; 
     353    unsigned int i; 
     354 
     355    for (i=0; i<n_quads; i++) 
     356      data[i] = CondSwapToBus32(data[i]); 
     357    if (get1394Service().write(0xffc0 | getNodeId(), reg, n_quads, data) <= 0) { 
     358        err = 1; 
     359        debugError("Error doing RME block write of %d quadlets to register 0x%06x\n", 
     360          n_quads, reg); 
     361    } 
     362    return (err==0)?0:-1; 
     363} 
    325364                   
    326365} 

  • trunk/libffado/src/rme/rme_avdevice.h

    r1533 r1534  
    9393 
    9494    unsigned int readRegister(fb_nodeaddr_t reg); 
     95    signed int readBlock(fb_nodeaddr_t reg, quadlet_t *buf, unsigned int n_quads); 
    9596    signed int writeRegister(fb_nodeaddr_t reg, quadlet_t data); 
     97    signed int writeBlock(fb_nodeaddr_t reg, quadlet_t *data, unsigned int n_quads); 
    9698 
    9799protected: 
    …… 
    109111    unsigned long long int flash_mixer_pan_addr(); 
    110112    unsigned long long int flash_mixer_hw_addr(); 
     113 
     114    /* Low-level flash memory functions */ 
     115    signed int wait_while_busy(unsigned int init_delay); 
     116    signed int get_revision(unsigned int *revision); 
     117    signed int read_flash(fb_nodeaddr_t addr, quadlet_t *buf, unsigned int n_quads); 
     118 
     119    /* Upper level flash memory functions */ 
     120    signed int read_device_settings(void); 
     121 
     122    /* Hardware functions */ 
     123    signed int init_hardware(void); 
    111124}; 
    112125 

  • trunk/libffado/src/SConscript

    r1498 r1534  
    178178rme_source = env.Split( '\ 
    179179        rme/rme_avdevice.cpp \ 
     180        rme/fireface_flash.cpp \ 
     181        rme/fireface_hw.cpp \ 
    180182' ) 
    181183