Changeset 1594
- Timestamp:
- 07/10/09 06:43:04 (14 years ago)
- Files:
-
- trunk/libffado/src/rme/fireface_def.h (modified) (5 diffs)
- trunk/libffado/src/rme/fireface_hw.cpp (modified) (6 diffs)
- trunk/libffado/src/rme/rme_avdevice.cpp (modified) (5 diffs)
- trunk/libffado/src/rme/rme_avdevice.h (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
- Moved
trunk/libffado/src/rme/fireface_def.h
r1593 r1594 244 244 #define SR0_INP_FREQ2 0x08000000 245 245 #define SR0_INP_FREQ3 0x10000000 246 #define SR0_WC _SYNC0x20000000247 #define SR0_WC _LOCK0x40000000246 #define SR0_WCLK_SYNC 0x20000000 247 #define SR0_WCLK_LOCK 0x40000000 248 248 249 249 #define SR0_ADAT1_STATUS_MASK (SR0_ADAT1_LOCK|SR0_ADAT1_SYNC) … … 264 264 #define SR0_WCLK_STATUS_SYNC (SR0_WCLK_LOCK|SR0_WCLK_SYNC) 265 265 266 #define SR0_SPDIF_FREQ_MASK (SR0_SPDIF_F0|SR0_SPDIF_F1|SR0_SPDIF_F2|SR0_SPDIF_F3) 267 #define SR0_SPDIF_FREQ_32k SR0_SPDIF_F0 268 #define SR0_SPDIF_FREQ_44k1 SR0_SPDIF_F1 269 #define SR0_SPDIF_FREQ_48k (SR0_SPDIF_F0|SR0_SPDIF_F1) 270 #define SR0_SPDIF_FREQ_64k SR0_SPDIF_F2 271 #define SR0_SPDIF_FREQ_88k2 (SR0_SPDIF_F0|SR0_SPDIF_F2) 272 #define SR0_SPDIF_FREQ_96k (SR0_SPDIF_F1|SR0_SPDIF_F2) 273 #define SR0_SPDIF_FREQ_128k (SR0_SPDIF_F0|SR0_SPDIF_F1|SR0_SPDIF_F2) 274 #define SR0_SPDIF_FREQ_176k4 SR0_SPDIF_F3 275 #define SR0_SPDIF_FREQ_192k (SR0_SPDIF_F0|SR0_SPDIF_F3) 276 266 277 #define SR0_AUTOSYNC_SRC_MASK (SR0_SEL_SYNC_REF0|SR0_SEL_SYNC_REF1|SR0_SEL_SYNC_REF2) 267 278 #define SR0_AUTOSYNC_SRC_ADAT1 0 … … 286 297 #define SR1_TCO_SYNC 0x00400000 287 298 288 #define SR 0_TCO_STATUS_MASK (SR0_TCO_LOCK|SR0_TCO_SYNC)289 #define SR 0_TCO_STATUS_NOLOCK 0290 #define SR 0_TCO_STATUS_LOCK SR0_TCO_LOCK291 #define SR 0_TCO_STATUS_SYNC (SR0_TCO_LOCK|SR0_TCO_SYNC)299 #define SR1_TCO_STATUS_MASK (SR1_TCO_LOCK|SR1_TCO_SYNC) 300 #define SR1_TCO_STATUS_NOLOCK 0 301 #define SR1_TCO_STATUS_LOCK SR1_TCO_LOCK 302 #define SR1_TCO_STATUS_SYNC (SR1_TCO_LOCK|SR1_TCO_SYNC) 292 303 293 304 /* Structure used to store device settings in the device flash RAM. This … … 418 429 #define FF_SWPARAM_SPDIF_OUTPUT_PRO_ON FF_DEV_FLASH_SPDIF_OUTPUT_PRO_ON 419 430 #define FF_SWPARAM_SPDIF_OUTPUT_NONAUDIO_ON FF_DEV_FLASH_SPDIF_OUTPUT_NONAUDIO_ON 420 #define FF_SWPARAM_ SPDIF_CLOCK_MODE_MASTERFF_DEV_FLASH_CLOCK_MODE_MASTER421 #define FF_SWPARAM_ SPDIF_CLOCK_MODE_AUTOSYNCFF_DEV_FLASH_CLOCK_MODE_AUTOSYNC422 #define FF_SWPARAM_ SPDIF_CLOCK_MODE_SLAVEFF_DEV_FLASH_CLOCK_MODE_SLAVE431 #define FF_SWPARAM_CLOCK_MODE_MASTER FF_DEV_FLASH_CLOCK_MODE_MASTER 432 #define FF_SWPARAM_CLOCK_MODE_AUTOSYNC FF_DEV_FLASH_CLOCK_MODE_AUTOSYNC 433 #define FF_SWPARAM_CLOCK_MODE_SLAVE FF_DEV_FLASH_CLOCK_MODE_SLAVE 423 434 #define FF_SWPARAM_SYNCREF_WORDCLOCK FF_DEV_FLASH_SYNCREF_WORDCLOCK 424 435 #define FF_SWPARAM_SYNCREF_ADAT1 FF_DEV_FLASH_SYNCREF_ADAT1 … … 449 460 // The general Fireface state 450 461 typedef struct { 462 uint32_t is_streaming; 451 463 uint32_t clock_mode; 452 464 uint32_t autosync_source; trunk/libffado/src/rme/fireface_hw.cpp
r1592 r1594 29 29 #include "debugmodule/debugmodule.h" 30 30 31 unsigned int multiplier(unsigned int freq) { 31 namespace Rme { 32 33 unsigned int 34 Device::multiplier_of_freq(unsigned int freq) 35 { 32 36 if (freq > MIN_QUAD_SPEED) 33 37 return 4; … … 36 40 return 1; 37 41 } 38 39 namespace Rme {40 42 41 43 signed int … … 52 54 settings.spdif_input_mode = FF_SWPARAM_SPDIF_INPUT_COAX; 53 55 settings.spdif_output_mode = FF_SWPARAM_SPDIF_OUTPUT_COAX; 54 settings.clock_mode = FF_SWPARAM_ SPDIF_CLOCK_MODE_MASTER;56 settings.clock_mode = FF_SWPARAM_CLOCK_MODE_MASTER; 55 57 settings.sync_ref = FF_SWPARAM_SYNCREF_WORDCLOCK; 56 58 settings.input_level = FF_SWPARAM_ILEVEL_LOGAIN; 57 59 settings.output_level = FF_SWPARAM_OLEVEL_HIGAIN; 58 60 61 // A default sampling rate. An explicit DDS frequency is not enabled 62 // by default. 63 m_software_freq = 44100; 64 m_dds_freq = 0; 65 59 66 return set_hardware_params(&settings); 60 67 } … … 68 75 *stat0 = buf[0]; 69 76 *stat1 = buf[1]; 77 return 0; 78 } 79 80 signed int 81 Device::get_hardware_state(FF_state_t *state) 82 { 83 // Retrieve the hardware status and deduce the device state. Return 84 // -1 on error, 0 on success. The given state structure will be 85 // cleared by this call. 86 unsigned int stat0, stat1; 87 memset(state, 0, sizeof(*state)); 88 if (get_hardware_status(&stat0, &stat1) != 0) 89 return -1; 90 91 state->is_streaming = (stat0 & SR0_IS_STREAMING) != 0; 92 93 state->clock_mode = (settings.clock_mode == FF_SWPARAM_CLOCK_MODE_MASTER)?FF_STATE_CLOCKMODE_MASTER:FF_STATE_CLOCKMODE_AUTOSYNC; 94 95 switch (stat0 & SR0_AUTOSYNC_SRC_MASK) { 96 case SR0_AUTOSYNC_SRC_ADAT1: 97 state->autosync_source = FF_STATE_AUTOSYNC_SRC_ADAT1; 98 break; 99 case SR0_AUTOSYNC_SRC_ADAT2: 100 state->autosync_source = FF_STATE_AUTOSYNC_SRC_ADAT2; 101 break; 102 case SR0_AUTOSYNC_SRC_SPDIF: 103 state->autosync_source = FF_STATE_AUTOSYNC_SRC_SPDIF; 104 break; 105 case SR0_AUTOSYNC_SRC_WCLK: 106 state->autosync_source = FF_STATE_AUTOSYNC_SRC_WCLK; 107 break; 108 case SR0_AUTOSYNC_SRC_TCO: 109 state->autosync_source = FF_STATE_AUTOSYNC_SRC_TCO; 110 break; 111 default: state->autosync_source = FF_STATE_AUTOSYNC_SRC_NOLOCK; 112 } 113 114 switch (stat0 & SR0_AUTOSYNC_FREQ_MASK) { 115 case SR0_AUTOSYNC_FREQ_32k: state->autosync_freq = 32000; break; 116 case SR0_AUTOSYNC_FREQ_44k1: state->autosync_freq = 44100; break; 117 case SR0_AUTOSYNC_FREQ_48k: state->autosync_freq = 48000; break; 118 case SR0_AUTOSYNC_FREQ_64k: state->autosync_freq = 64000; break; 119 case SR0_AUTOSYNC_FREQ_88k2: state->autosync_freq = 88200; break; 120 case SR0_AUTOSYNC_FREQ_96k: state->autosync_freq = 96000; break; 121 case SR0_AUTOSYNC_FREQ_128k: state->autosync_freq = 128000; break; 122 case SR0_AUTOSYNC_FREQ_176k4:state->autosync_freq = 176400; break; 123 case SR0_AUTOSYNC_FREQ_192k: state->autosync_freq = 192000; break; 124 } 125 126 switch (stat0 & SR0_SPDIF_FREQ_MASK) { 127 case SR0_SPDIF_FREQ_32k: state->spdif_freq = 32000; break; 128 case SR0_SPDIF_FREQ_44k1: state->spdif_freq = 41000; break; 129 case SR0_SPDIF_FREQ_48k: state->spdif_freq = 48000; break; 130 case SR0_SPDIF_FREQ_64k: state->spdif_freq = 64000; break; 131 case SR0_SPDIF_FREQ_88k2: state->spdif_freq = 88200; break; 132 case SR0_SPDIF_FREQ_96k: state->spdif_freq = 96000; break; 133 case SR0_SPDIF_FREQ_128k: state->spdif_freq = 128000; break; 134 case SR0_SPDIF_FREQ_176k4:state->spdif_freq = 176400; break; 135 case SR0_SPDIF_FREQ_192k: state->spdif_freq = 192000; break; 136 } 137 138 switch (stat0 & SR0_ADAT1_STATUS_MASK) { 139 case SR0_ADAT1_STATUS_NOLOCK: 140 state->adat1_sync_status = FF_STATE_SYNC_NOLOCK; break; 141 case SR0_ADAT1_STATUS_LOCK: 142 state->adat1_sync_status = FF_STATE_SYNC_LOCKED; break; 143 case SR0_ADAT1_STATUS_SYNC: 144 state->adat1_sync_status = FF_STATE_SYNC_SYNCED; break; 145 } 146 switch (stat0 & SR0_ADAT2_STATUS_MASK) { 147 case SR0_ADAT2_STATUS_NOLOCK: 148 state->adat2_sync_status = FF_STATE_SYNC_NOLOCK; break; 149 case SR0_ADAT2_STATUS_LOCK: 150 state->adat2_sync_status = FF_STATE_SYNC_LOCKED; break; 151 case SR0_ADAT2_STATUS_SYNC: 152 state->adat2_sync_status = FF_STATE_SYNC_SYNCED; break; 153 } 154 switch (stat0 & SR0_SPDIF_STATUS_MASK) { 155 case SR0_SPDIF_STATUS_NOLOCK: 156 state->spdif_sync_status = FF_STATE_SYNC_NOLOCK; break; 157 case SR0_SPDIF_STATUS_LOCK: 158 state->spdif_sync_status = FF_STATE_SYNC_LOCKED; break; 159 case SR0_SPDIF_STATUS_SYNC: 160 state->spdif_sync_status = FF_STATE_SYNC_SYNCED; break; 161 } 162 switch (stat0 & SR0_WCLK_STATUS_MASK) { 163 case SR0_WCLK_STATUS_NOLOCK: 164 state->wclk_sync_status = FF_STATE_SYNC_NOLOCK; break; 165 case SR0_WCLK_STATUS_LOCK: 166 state->wclk_sync_status = FF_STATE_SYNC_LOCKED; break; 167 case SR0_WCLK_STATUS_SYNC: 168 state->wclk_sync_status = FF_STATE_SYNC_SYNCED; break; 169 } 170 switch (stat1 & SR1_TCO_STATUS_MASK) { 171 case SR1_TCO_STATUS_NOLOCK: 172 state->tco_sync_status = FF_STATE_SYNC_NOLOCK; break; 173 case SR1_TCO_STATUS_LOCK: 174 state->tco_sync_status = FF_STATE_SYNC_LOCKED; break; 175 case SR1_TCO_STATUS_SYNC: 176 state->tco_sync_status = FF_STATE_SYNC_SYNCED; break; 177 } 178 70 179 return 0; 71 180 } … … 162 271 data[2] |= (sw_settings->spdif_output_nonaudio==FF_SWPARAM_SPDIF_OUTPUT_NONAUDIO_ON) ? CR2_SPDIF_OUT_NONAUDIO : 0; 163 272 data[2] |= (sw_settings->spdif_output_mode==FF_SWPARAM_SPDIF_OUTPUT_OPTICAL) ? CR2_SPDIF_OUT_ADAT2 : 0; 164 data[2] |= (sw_settings->clock_mode==FF_SWPARAM_ SPDIF_CLOCK_MODE_AUTOSYNC) ? CR2_CLOCKMODE_AUTOSYNC : CR2_CLOCKMODE_MASTER;273 data[2] |= (sw_settings->clock_mode==FF_SWPARAM_CLOCK_MODE_AUTOSYNC) ? CR2_CLOCKMODE_AUTOSYNC : CR2_CLOCKMODE_MASTER; 165 274 data[2] |= (sw_settings->spdif_input_mode==FF_SWPARAM_SPDIF_INPUT_COAX) ? CR2_SPDIF_IN_COAX : CR2_SPDIF_IN_ADAT2; 166 275 data[2] |= (sw_settings->word_clock_single_speed=FF_SWPARAM_WORD_CLOCK_1x) ? CR2_WORD_CLOCK_1x : 0; … … 277 386 278 387 return 0; 388 } 389 390 signed int 391 Device::hardware_is_streaming(void) 392 { 393 // Return 1 if the hardware is streaming, 0 if not. 394 unsigned int s1, s2; 395 if (get_hardware_status(&s1, &s2) != 0) 396 return 0; 397 return (s1 & SR0_IS_STREAMING) != 0; 279 398 } 280 399 trunk/libffado/src/rme/rme_avdevice.cpp
r1592 r1594 180 180 } 181 181 182 // Find out the device's streaming status 183 is_streaming = hardware_is_streaming(); 184 182 185 init_hardware(); 183 186 … … 190 193 int 191 194 Device::getSamplingFrequency( ) { 192 /* 193 * Retrieve the current sample rate from the RME device. At this stage it 194 * seems that the "current rate" can't be retrieved from the device. Other 195 * drivers don't read the DDS control register and there isn't anywhere else 196 * where the frequency is sent back to the PC. Unless we test the DDS 197 * control register for readabilty and find it can be read we'll assume it 198 * can't and instead cache the DDS frequency. 199 * 200 * If the device frequency has not been set this function will return -1 201 * (the default value of m_ddsFreq). 202 */ 195 196 // Retrieve the current sample rate. For practical purposes this 197 // is the software rate currently in use. 203 198 return m_software_freq; 204 199 } … … 208 203 { 209 204 return 0; 205 } 206 207 bool 208 Device::setDDSFrequency( int dds_freq ) 209 { 210 // Set a fixed DDS frequency. If the device is the clock master this 211 // will immediately be copied to the hardware DDS register. Otherwise 212 // it will take effect as required at the time the sampling rate is 213 // changed or streaming is started. 214 215 // If the device is streaming, the new DDS rate must have the same 216 // multiplier as the software sample rate 217 if (hardware_is_streaming()) { 218 if (multiplier_of_freq(dds_freq) != multiplier_of_freq(m_software_freq)) 219 return false; 220 } 221 222 m_dds_freq = dds_freq; 223 if (settings.clock_mode == FF_STATE_CLOCKMODE_MASTER) { 224 if (set_hardware_dds_freq(dds_freq) != 0) 225 return false; 226 } 227 228 return true; 210 229 } 211 230 … … 229 248 signed int i, j; 230 249 signed int mult[3] = {1, 2, 4}; 231 signed int freq[3] = {32000, 44100, 48000}; 232 233 /* Work out whether the requested rate is supported */ 234 for (i=0; i<3; i++) { 235 for (j=0; j<3; i++) { 236 if (samplingFrequency==freq[j]*mult[i]) { 250 signed int base_freq[3] = {32000, 44100, 48000}; 251 signed int freq = samplingFrequency; 252 FF_state_t state; 253 signed int fixed_freq = 0; 254 255 get_hardware_state(&state); 256 257 // If device is locked to a frequency via external clock, explicit 258 // setting of the DDS or by virtue of streaming being active, get that 259 // frequency. 260 if (state.clock_mode == FF_STATE_CLOCKMODE_AUTOSYNC) { 261 // FIXME: if synced to TCO, is autosync_freq valid? 262 fixed_freq = state.autosync_freq; 263 } else 264 if (m_dds_freq > 0) { 265 fixed_freq = m_dds_freq; 266 } else 267 if (hardware_is_streaming()) { 268 fixed_freq = m_software_freq; 269 } 270 271 // If the device is running to a fixed frequency, software can only 272 // request frequencies with the same multiplier. Similarly, the 273 // multiplier is locked in "master" clock mode if the device is 274 // streaming. 275 if (fixed_freq > 0) { 276 signed int fixed_mult = multiplier_of_freq(fixed_freq); 277 if (multiplier_of_freq(freq) != multiplier_of_freq(fixed_freq)) 278 return -1; 279 for (j=0; j<3; j++) { 280 if (freq == base_freq[j]*fixed_mult) { 237 281 ret = 0; 238 282 break; 239 283 } 240 284 } 241 } 285 } else { 286 for (i=0; i<3; i++) { 287 for (j=0; j<3; j++) { 288 if (freq == base_freq[j]*mult[i]) { 289 ret = 0; 290 break; 291 } 292 } 293 } 294 } 295 // If requested frequency is unavailable, return -1 242 296 if (ret == -1) 243 297 return false; 244 298 245 // FIXME: still have to verify compatibility with current rate if 246 // running, DDS if set or external clock if relevant. 247 248 if (set_hardware_dds_freq(samplingFrequency) != 0) 299 // If a DDS frequency has been explicitly requested this is always 300 // used to programm the hardware DDS regardless of the rate requested 301 // by the software. Otherwise we use the requested sampling rate. 302 if (m_dds_freq > 0) 303 freq = m_dds_freq; 304 if (set_hardware_dds_freq(freq) != 0) 249 305 return false; 250 306 … … 260 316 signed int mult[3] = {1, 2, 4}; 261 317 signed int freq[3] = {32000, 44100, 48000}; 262 263 // Generate the list of supported frequencies 264 // FIXME: this could be limited based on the device's current status 265 for (i=0; i<3; i++) { 266 for (j=0; j<3; i++) { 267 frequencies.push_back(freq[j]*mult[i]); 318 FF_state_t state; 319 320 get_hardware_state(&state); 321 322 // Generate the list of supported frequencies. If the device is 323 // externally clocked the frequency is limited to the external clock 324 // frequency. If the device is running the multiplier is fixed. 325 if (state.clock_mode == FF_STATE_CLOCKMODE_MASTER) { 326 // FIXME: if synced to TCO, is autosync_freq valid? 327 frequencies.push_back(state.autosync_freq); 328 } else 329 if (hardware_is_streaming()) { 330 unsigned int fixed_mult = multiplier_of_freq(m_software_freq); 331 for (j=0; j<3; j++) { 332 frequencies.push_back(freq[j]*fixed_mult); 333 } 334 } else { 335 for (i=0; i<3; i++) { 336 for (j=0; j<3; j++) { 337 frequencies.push_back(freq[j]*mult[i]); 338 } 268 339 } 269 340 } trunk/libffado/src/rme/rme_avdevice.h
r1592 r1594 65 65 virtual void showDevice(); 66 66 67 bool setDDSFrequency( int dds_freq ); 67 68 virtual bool setSamplingFrequency( int samplingFrequency ); 68 69 virtual int getSamplingFrequency( ); … … 92 93 93 94 signed int is_streaming; 94 signed int m_dds_freq; 95 signed int m_software_freq; // Sampling frequency requestedby software95 signed int m_dds_freq; // Optionally explicitly set hardware freq 96 signed int m_software_freq; // Sampling frequency in use by software 96 97 97 98 signed int tco_present; … … 120 121 121 122 /* Hardware functions */ 123 unsigned int multiplier_of_freq(unsigned int freq); 122 124 signed int init_hardware(void); 123 125 signed int get_hardware_status(unsigned int *stat0, unsigned int *stat1); 126 signed int get_hardware_state(FF_state_t *state); 124 127 signed int set_hardware_params(FF_software_settings_t *sw_settings); 128 125 129 signed int read_tco(quadlet_t *tco_data, signed int size); 126 130 signed int write_tco(quadlet_t *tco_data, signed int size); 131 signed int hardware_is_streaming(void); 127 132 128 133 signed int read_tco_state(FF_TCO_state_t *tco_state);