Changeset 1596

Timestamp:

07/12/09 06:30:55 (14 years ago)

Author:

jwoithe

Message:

RME:

• implement lowlevel streaming control/setup/status functions
  
• fill in further status register details
  
• update documentation
  

Files:

• trunk/libffado/doc/rme_notes/rme_config_register_map.txt (modified) (3 diffs)
• trunk/libffado/src/rme/fireface_def.h (modified) (7 diffs)
• trunk/libffado/src/rme/fireface_hw.cpp (modified) (2 diffs)
• trunk/libffado/src/rme/rme_avdevice.cpp (modified) (1 diff)
• trunk/libffado/src/rme/rme_avdevice.h (modified) (3 diffs)

trunk/libffado/doc/rme_notes/rme_config_register_map.txt

@@ -2 +2 @@
-============================================
-
-1
+2
-Author: Jonathan Woithe
-27 June
+12 July
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@@ -73 +73 @@
-Sample rate is controlled by writing the desired sample rate in Hz to the
-sample rate control register located at offset 0 from the command buffer
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-In terms of multipliers the RME treats sample rates greater than 112000 Hz
-as 4x rates, with rates greater than 56000 Hz as 2x rates.  Rates less than
-30000 Hz and greater than 210000 Hz are invalid.
-
-It is not yet known how the driver works out that the DDS is active since
-the device flash settings are not read and in any case, if the device flash
-settings have not been set they won't indicate anything useful about the
-current device state.
-
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@@ -195 +195 @@
-On the FF400, writing to these registers with valid values for the first
-time after power up has the side effect of extingishing the "Host" LED.
+
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+Device status registers
+-----------------------
+
+There are up to 4 read-only device status registers available, starting at
+address 0x801c0000.  There seems to be a slight difference in the mapping of
+status register 0 depending on the size of the read.  If only 2 registers
+(quadlets) are read the "general" layout is assumed.  If on the other hand 4
+registers are used (used when determining the status of the device's
+streaming system) the layout of register 0 is slightly different.
+
+Status register 0:
+  bit 0: on a 2-quadlet read, this indicates whether the device is streaming
+  bits 1-9: on a 2-quadlet read these bits are all zero
+  bits 9-0: on a 4-quadlet read when in autosync mode, these bits contain
+            SR/250, where SR is the sample rate to be passed to the
+            streaming subsystem when starting streaming.
+  bit 10: ADAT1 lock achieved
+  bit 11: ADAT2 lock achieved
+  bit 12: Device is synced to ADAT1
+  bit 13: Device is synced to ADAT2
+  bits 17-14: SPDIF frequency:
+    0000 = undefined    0101 = 88.2k
+    0001 = 32k          0110 = 96k
+    0010 = 44.1k        0111 = 128k
+    0011 = 48k          1000 = 176.4k
+    0100 = 64k          1001 = 192k
+  bit 18: Device is synced to SPDIF
+  bit 19: Over detected
+  bit 20: SPDIF lock achieved
+  bit 21: undefined (read as zero)
+  bits 24-22: Primary sync source:
+    000 = ADAT1         100 = Word clock
+    001 = ADAT2         101 = TCO
+    011 = SPDIF
+  bits 28-25: autosync (external) frequency (defined as for SPDIF frequency)
+  bit 29: Device is synced to word clock
+  bit 30: Word clock lock achieved
+  bit 31: undefined (read as zero)
+
+Status register 1:
+  bit 0: master clock mode active
+  bits 21-1: undefined
+  bit 22: Device is synced to TCO
+  bit 23: TCO lock achieved
+  bits 31-24: undefined
+
+Status register 2:
+  bits 31-0: (FF800 only) firewire iso channel used for data from FF800 to PC
+
+Status register 3:
+  bits 31-0: unused
-
-

trunk/libffado/src/rme/fireface_def.h

@@ -41 +41 @@
-#define MAX_SPEED               210000
-
+// A flag used to indicate the use of a 800 Mbps bus speed to various
+// streaming registers of the FF800.
+#define RME_FF800_STREAMING_SPEED_800 0x800
+
-/* The Command Buffer Address (CBA) is different for the two interfaces */
-#define RME_FF400_CMD_BUFFER    0x80100500
@@ -58 +62 @@
-
-#define RME_FF400_STREAM_INIT_REG   (RME_FF400_CMD_BUFFER)           // 3 quadlets wide
+#define RME_FF400_STREAM_INIT_SIZE  3              // Size in quadlets
-#define RME_FF400_STREAM_SRATE      (RME_FF400_CMD_BUFFER)
-#define RME_FF400_STREAM_CONF0      (RME_FF400_CMD_BUFFER+4)
-#define RME_FF400_STREAM_CONF1      (RME_FF400_CMD_BUFFER+8)
-#define RME_FF800_STREAM_INIT_REG   0x20000001cLL                    // 3 quadlets wide
+#define RME_FF800_STREAM_INIT_SIZE  3              // Size in quadlets
-#define RME_FF800_STREAM_SRATE      0x20000001cLL
-#define RME_FF800_STREAM_CONF0      (0x20000001cLL+4)
@@ -68 +74 @@
-#define RME_FF800_STREAM_START_REG  0x200000028LL                    // 1 quadlet
-#define RME_FF400_STREAM_END_REG    (RME_FF400_CMD_BUFFER + 0x0004)  // 4 quadlets wide
+#define RME_FF400_STREAM_END_SIZE   4              // Size in quadlets
-#define RME_FF800_STREAM_END_REG    0x200000034LL                    // 3 quadlets wide
+#define RME_FF800_STREAM_END_SIZE   3              // Size in quadlets
-
-#define RME_FF800_HOST_LED_REG      0x200000324LL
@@ -225 +233 @@
-/* Defines for the status registers */
-// Status register 0
-#define SR0_IS_STREAMING        0x00000001
-#define SR0_ADAT1_LOCK          0x00000400
-#define SR0_ADAT2_LOCK          0x00000800
@@ -237 +244 @@
-#define SR0_OVER                0x00080000
-#define SR0_SPDIF_LOCK          0x00100000
-2
-4
+4
+8
-#define SR0_SEL_SYNC_REF2       0x01000000
-#define SR0_INP_FREQ0           0x02000000
@@ -246 +253 @@
-#define SR0_WCLK_SYNC           0x20000000
-#define SR0_WCLK_LOCK           0x40000000
+
+// It seems the definition of SR0 is a little different depending on whether
+// 2 or 4 status registers are read.  In the case of a request for 2, the
+// following additional bits are defined.
+#define SR0_IS_STREAMING        0x00000001
+// If 4 quadlets are requested (as is done when checking the streaming
+// system status), the lowest 10 bits instead represent sample_rate/250 if
+// locked to an external clock source.
+#define SR0_STREAMING_FREQ_MASK 0x000003ff
-
-#define SR0_ADAT1_STATUS_MASK   (SR0_ADAT1_LOCK|SR0_ADAT1_SYNC)
@@ -292 +308 @@
-#define SR0_AUTOSYNC_FREQ_176k4 SR0_INP_FREQ3
-#define SR0_AUTOSYNC_FREQ_192k  (SR0_INP_FREQ0|SR0_INP_FREQ3)
+#define SR0_AUTOSYNC_FREQ_NONE  0
-
-// Status register 1
+#define SR1_CLOCK_MODE_MASTER   0x00000001
+#define SR1_TCO_SYNC            0x00400000
-#define SR1_TCO_LOCK            0x00800000
-#define SR1_TCO_SYNC            0x00400000
-
-#define SR1_TCO_STATUS_MASK    (SR1_TCO_LOCK|SR1_TCO_SYNC)

trunk/libffado/src/rme/fireface_hw.cpp

@@ -79 +79 @@
-
-signed int
+Device::get_hardware_streaming_status(unsigned int *stat, unsigned int n)
+{
+    // Get the hardware status as it applies to the streaming system.  This
+    // involves a request of 4 quadlets from the status register.  It
+    // appears that the first register's definition is slightly different in
+    // this situation compared to when only 2 quadlets are requested as is
+    // done in get_hardware_status().
+    //
+    // "n" is the size of the passed-in stat array.  It must be >= 4.
+    if (n < 4)
+        return -1;
+    if (readBlock(RME_FF_STATUS_REG0, stat, 4) != 0)
+        return -1;
+    return 0;
+}
+
+signed int
-Device::get_hardware_state(FF_state_t *state)
-{
@@ -557 +574 @@
-}
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trunk/libffado/src/rme/rme_avdevice.cpp

@@ -100 +100 @@
-    , m_software_freq( -1 )
-    , tco_present( 0 )
+    , num_channels( 0 )
+    , samples_per_packet( 0 )
+    , speed800( 0 )
-{
-    debugOutput( DEBUG_LEVEL_VERBOSE, "Created Rme::Device (NodeID %d)\n",

trunk/libffado/src/rme/rme_avdevice.h

@@ -99 +99 @@
-    FF_software_settings_t settings;
-
+    signed int num_channels;
+    signed int samples_per_packet;
+    signed int speed800;
+
-private:
-    unsigned long long int cmd_buffer_addr();
@@ -124 +128 @@
-    signed int init_hardware(void);
-    signed int get_hardware_status(unsigned int *stat0, unsigned int *stat1);
+    signed int get_hardware_streaming_status(unsigned int *stat, unsigned int n);
-    signed int get_hardware_state(FF_state_t *state);
-    signed int set_hardware_params(FF_software_settings_t *sw_settings);
@@ -135 +140 @@
-
-    signed int set_hardware_dds_freq(signed int freq);
+
+    signed int hardware_init_streaming(unsigned int sample_rate, unsigned int tx_channel);
+    signed int hardware_start_streaming(unsigned int listen_channel);
+    signed int hardware_stop_streaming(void);
-};
-