Changeset 1690

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Timestamp:
10/17/09 06:15:46 (12 years ago)
Author:
jwoithe
Message:

RME:
* work on streaming setup continues
* some whitespace cleanups
* update documentation

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  • trunk/libffado/doc/rme_notes/rme_config_register_map.txt

    r1616 r1690  
    22============================================ 
    33 
    4 Version: 0.17 
     4Version: 0.18 
    55Author: Jonathan Woithe 
    6 Date: 13 August 2009 
     6Date: 17 October 2009 
    77 
    88 
     
    554554 
    555555This register comprises the 3 quadlets starting at address 0x20000001c on 
    556 the FF800 and the CBA on the FF400.  The first quadlet contains the sample 
    557 rate in Hz.  The second quadlet is mapped as follows: 
     556the FF800 and the 5 quadlets starting at the CBA on the FF400.  The first  
     557quadlet contains the sample rate in Hz.  The second quadlet is mapped as  
     558follows: 
    558559  bits 31-11 = number of audio channels 
    559560  bits 10-0  = iso tx channel (PC to interface) 
     
    567568(28 channels, 400 Mbps firewire bus). 
    568569 
     570The forth and fifth quadlets (used only by the FF400) are zero. 
     571 
    569572After this register is configured, 4 quadlets are read starting from 
    570 0x801c0000.  The numbers returned don't appear to bear any relationship to 
    571 those written to this same location later on. 
    572  
    573 Device (streaming) start register (FF800: 0x200000028, FF400: CBA+0x1c): 
     5730x801c0000.  When read, these are the device status registers. 
     574 
     575Device (streaming) start register (FF800: 0x200000028, FF400: CBA+0x0c): 
    574576 
    575577The start of streaming differs between the FF400 and FF800 in more than just 
  • trunk/libffado/src/rme/fireface_def.h

    r1689 r1690  
    4646#define RME_FF800_CMD_BUFFER    0xfc88f000 
    4747 
    48 /* Offsets for registers at fixed offsets from the device's command buffer address */ 
     48// Offsets for registers at fixed offsets from the device's command buffer  
     49// address  
    4950#define RME_FF_DDS_SRATE_OFS      (0*4) 
    5051#define RME_FF_CONF1_OFS          (5*4) 
     
    5859#define RME_FF800_CONF_REG          (RME_FF800_CMD_BUFFER + RME_FF_CONF1_OFS) 
    5960 
    60 #define RME_FF400_STREAM_INIT_REG   (RME_FF400_CMD_BUFFER)           // 3 quadlets wide 
    61 #define RME_FF400_STREAM_INIT_SIZE  3              // Size in quadlets 
     61#define RME_FF400_STREAM_INIT_REG   (RME_FF400_CMD_BUFFER)  // 5 quadlets wide 
     62#define RME_FF400_STREAM_INIT_SIZE  5                       // Size in quadlets 
    6263#define RME_FF400_STREAM_SRATE      (RME_FF400_CMD_BUFFER) 
    6364#define RME_FF400_STREAM_CONF0      (RME_FF400_CMD_BUFFER+4) 
    6465#define RME_FF400_STREAM_CONF1      (RME_FF400_CMD_BUFFER+8) 
    65 #define RME_FF800_STREAM_INIT_REG   0x20000001cLL                    // 3 quadlets wide 
    66 #define RME_FF800_STREAM_INIT_SIZE  3              // Size in quadlets 
     66#define RME_FF800_STREAM_INIT_REG   0x20000001cLL           // 3 quadlets wide 
     67#define RME_FF800_STREAM_INIT_SIZE  3                       // Size in quadlets 
    6768#define RME_FF800_STREAM_SRATE      0x20000001cLL 
    6869#define RME_FF800_STREAM_CONF0      (0x20000001cLL+4) 
    6970#define RME_FF800_STREAM_CONF1      (0x20000001cLL+8) 
    70 #define RME_FF400_STREAM_START_REG  (RME_FF400_CMD_BUFFER + 0x001c)  // 1 quadlet 
     71#define RME_FF400_STREAM_START_REG  (RME_FF400_CMD_BUFFER + 0x000c)  // 1 quadlet 
    7172#define RME_FF800_STREAM_START_REG  0x200000028LL                    // 1 quadlet 
    7273#define RME_FF400_STREAM_END_REG    (RME_FF400_CMD_BUFFER + 0x0004)  // 4 quadlets wide 
    7374#define RME_FF400_STREAM_END_SIZE   4              // Size in quadlets 
    74 #define RME_FF800_STREAM_END_REG    0x200000034LL                    // 3 quadlets wide 
     75#define RME_FF800_STREAM_END_REG    0x200000034LL  // 3 quadlets wide 
    7576#define RME_FF800_STREAM_END_SIZE   3              // Size in quadlets 
    7677 
  • trunk/libffado/src/rme/fireface_hw.cpp

    r1688 r1690  
    7474        settings->output_level = FF_SWPARAM_OLEVEL_HIGAIN; 
    7575        settings->phones_level = FF_SWPARAM_PHONESLEVEL_HIGAIN; 
     76        settings->limit_bandwidth = FF_SWPARAM_BWLIMIT_SEND_ALL_CHANNELS; 
    7677 
    7778        // Set amplifier gains 
     
    404405 
    405406//This is just for testing - it's a known consistent configuration 
    406 //data[0] = 0x00020811;      // Phantom off 
     407//data[0] = 0x00020810;      // Phantom off 
    407408//data[0] = 0x00020811;      // Phantom on 
    408409//data[1] = 0x0000031e; 
     
    415416        return -1; 
    416417 
    417     return -0; 
     418    return 0; 
    418419} 
    419420 
     
    672673    } 
    673674 
     675{signed int i; 
     676  printf("addr %016llx\n", addr); 
     677  for (i=0; i<5; i++) 
     678    printf("0x%08x ", buf[i]); 
     679  printf("\n"); 
     680} 
     681 
    674682    return writeBlock(addr, buf, size); 
    675683} 
     
    696704        } 
    697705 
     706printf("start 0x%016llx data: %08x\n", addr, data); 
    698707        ret = writeRegister(addr, data); 
    699708        if (ret == 0) { 
  • trunk/libffado/src/rme/rme_avdevice.cpp

    r1689 r1690  
    553553    if (settings->limit_bandwidth != FF_SWPARAM_BWLIMIT_ANALOG_ONLY) 
    554554        num_channels += 2; 
    555     if (settings->limit_bandwidth==FF_SWPARAM_BWLIMIT_NO_ADAT2 || 
     555    if (settings->limit_bandwidth==FF_SWPARAM_BWLIMIT_SEND_ALL_CHANNELS) 
     556        num_channels += (mult==4?0:(mult==2?4:8)); 
     557    if (m_rme_model==RME_MODEL_FIREFACE800 && 
    556558        settings->limit_bandwidth==FF_SWPARAM_BWLIMIT_SEND_ALL_CHANNELS) 
    557         num_channels += (mult==4?0:(mult==2?4:8)); 
    558     if (settings->limit_bandwidth==FF_SWPARAM_BWLIMIT_SEND_ALL_CHANNELS) 
    559559        num_channels += (mult==4?0:(mult==2?4:8)); 
    560560 
     
    593593                break; 
    594594            } 
     595{ 
     596signed int j; 
     597printf("init stat: "); 
     598for (j=0;j<4;j++){ 
     599  printf("%08x ", stat[j]); 
     600} 
     601printf("\n"); 
     602} 
    595603            if (m_rme_model == RME_MODEL_FIREFACE400) { 
    596604                iso_rx_channel = get1394Service().allocateIsoChannelGeneric(bandwidth); 
     
    598606            } 
    599607            // The Fireface-800 chooses its tx channel (our rx channel). 
    600             if (stat[2] == -1) { 
     608            if (stat[2] == 0xffffffff) { 
    601609                // Device not ready; wait 5 ms and try again 
    602610                usleep(5000);