Changeset 1715
- Timestamp:
- 11/16/09 03:47:58 (13 years ago)
- Files:
-
- branches/libffado-2.0/src/motu/motu_avdevice.cpp (modified) (8 diffs)
- branches/libffado-2.0/src/motu/motu_avdevice.h (modified) (1 diff)
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branches/libffado-2.0/src/motu/motu_avdevice.cpp
r1704 r1715 473 473 * Retrieve the current sample rate from the MOTU device. 474 474 */ 475 quadlet_t q = ReadRegister(MOTU_REG_CLK_CTRL);475 quadlet_t q = 0; 476 476 int rate = 0; 477 477 478 if (m_motu_model == MOTU_MODEL_828MkI) { 479 /* The original MOTU interfaces did things rather differently */ 480 q = ReadRegister(MOTU_G1_REG_CONFIG); 481 if ((q & MOTU_G1_RATE_MASK) == MOTU_G1_RATE_44100) 482 rate = 44100; 483 else 484 rate = 48000; 485 return rate; 486 } 487 488 q = ReadRegister(MOTU_REG_CLK_CTRL); 478 489 switch (q & MOTU_RATE_BASE_MASK) { 479 490 case MOTU_RATE_BASE_44100: … … 520 531 if ( samplingFrequency > DevicesProperty[m_motu_model-1].MaxSampleRate ) 521 532 return false; 533 534 /* The original MOTU devices do things differently; they are much 535 * simpler than the later interfaces. 536 */ 537 if (m_motu_model == MOTU_MODEL_828MkI) { 538 reg = ReadRegister(MOTU_G1_REG_CONFIG); 539 if (samplingFrequency > 0) { 540 reg &= ~MOTU_G1_RATE_MASK; 541 switch (samplingFrequency) { 542 case 44100: 543 reg |= MOTU_G1_RATE_44100; 544 break; 545 case 48000: 546 reg |= MOTU_G1_RATE_48000; 547 default: 548 // Unsupported rate 549 return false; 550 } 551 } 552 if (clock_source != MOTU_CLKSRC_UNCHANGED) { 553 switch (clock_source) { 554 case MOTU_CLKSRC_INTERNAL: 555 clock_source = MOTU_G1_CLKSRC_INTERNAL; break; 556 case MOTU_CLKSRC_SPDIF_TOSLINK: 557 clock_source = MOTU_G1_CLKSRC_SPDIF; break; 558 case MOTU_CLKSRC_ADAT_9PIN: 559 clock_source = MOTU_G1_CLKSRC_ADAT_9PIN; break; 560 default: 561 // Unsupported clock source 562 return false; 563 } 564 reg &= ~MOTU_G1_CLKSRC_MASK; 565 reg |= clock_source; 566 } 567 if (WriteRegister(MOTU_G1_REG_CONFIG, reg) != 0) 568 return false; 569 return true; 570 } 571 572 /* The rest of this function deals with later generation devices */ 522 573 523 574 reg = ReadRegister(MOTU_REG_CLK_CTRL); … … 683 734 MotuDevice::clockIdToClockSource(unsigned int id) { 684 735 ClockSource s; 736 bool g1_model = (m_motu_model == MOTU_MODEL_828MkI); 685 737 s.id = id; 686 738 … … 698 750 s.type = eCT_ADAT; 699 751 s.description = "ADAT optical"; 752 s.valid = s.active = s.locked = !g1_model; 700 753 break; 701 754 case MOTU_CLKSRC_SPDIF_TOSLINK: … … 715 768 s.type = eCT_WordClock; 716 769 s.description = "Wordclock"; 770 s.valid = s.active = s.locked = !g1_model; 717 771 break; 718 772 case MOTU_CLKSRC_ADAT_9PIN: … … 723 777 s.type = eCT_AES; 724 778 s.description = "AES/EBU"; 779 s.valid = s.active = s.locked = !g1_model; 725 780 break; 726 781 default: … … 1113 1168 1114 1169 unsigned int MotuDevice::getOpticalMode(unsigned int dir) { 1115 unsigned int reg = ReadRegister(MOTU_REG_ROUTE_PORT_CONF); 1170 unsigned int reg; 1171 1172 if (m_motu_model == MOTU_MODEL_828MkI) { 1173 // The early devices used a different register layout. 1174 // To be completed. 1175 return 0; 1176 } 1177 1178 reg = ReadRegister(MOTU_REG_ROUTE_PORT_CONF); 1116 1179 1117 1180 debugOutput(DEBUG_LEVEL_VERBOSE, "optical mode: %x %x %x %x\n",dir, reg, reg & MOTU_OPTICAL_IN_MODE_MASK, … … 1133 1196 if (m_motu_model==MOTU_MODEL_896HD && mode==MOTU_OPTICAL_MODE_TOSLINK) 1134 1197 return -1; 1198 1199 if (m_motu_model == MOTU_MODEL_828MkI) { 1200 // The earlier MOTUs handle this differently. 1201 // To be completed. 1202 return 0; 1203 } 1135 1204 1136 1205 // Set up the optical control register value according to the current branches/libffado-2.0/src/motu/motu_avdevice.h
r1703 r1715 89 89 #define MOTU_REG_INPUT_GAIN_PHINV1 0x0c74 90 90 #define MOTU_REG_INPUT_GAIN_PHINV2 0x0c78 91 92 /* Device register definitions for the earliest generation devices */ 93 #define MOTU_G1_REG_CONFIG 0x0b00 94 95 /* The optical mode defines for the 828Mk1 are estimates at present, to be 96 * confirmed. 97 */ 98 #define MOTU_G1_OPT_IN_MODE_MASK 0x0000 // Still be be observed 99 #define MOTU_G1_OPT_IN_MODE_BIT0 0 // Still to be observed 100 #define MOTU_G1_OPT_OUT_MODE_MASK 0xc000 101 #define MOTU_G1_OPT_OUT_MODE_BIT0 26 102 #define MOTU_G1_OPTICAL_OFF 0x0000 103 #define MOTU_G1_OPTICAL_TOSLINK 0x0001 104 #define MOTU_G1_OPTICAL_ADAT 0x0002 105 106 #define MOTU_G1_RATE_MASK 0x0004 107 #define MOTU_G1_RATE_44100 0x0000 108 #define MOTU_G1_RATE_48000 0x0004 109 110 #define MOTU_G1_CLKSRC_MASK 0x0003 111 #define MOTU_G1_CLKSRC_INTERNAL 0x0000 112 #define MOTU_G1_CLKSRC_ADAT_9PIN 0x0001 113 #define MOTU_G1_CLKSRC_SPDIF 0x0002 114 #define MOTU_G1_CLKSRC_UNCHANGED MOTU_CLKSRC_UNCHANGED 115 116 #define MOTU_G1_MONIN_MASK 0x3f00 117 #define MOTU_G1_MONIN_L_SRC_MASK 0x0600 118 #define MOTU_G1_MONIN_R_SRC_MASK 0x3000 119 #define MOTU_G1_MONIN_L_MUTE_MASK 0x0100 // Yes, the sense of these 2 bits 120 #define MOTU_G1_MONIN_R_EN_MASK 0x0800 // really are reversed 121 #define MOTU_G1_MONIN_L_MUTE 0x0100 122 #define MOTU_G1_MONIN_L_ENABLE 0x0000 123 #define MOTU_G1_MONIN_R_MUTE 0x0000 124 #define MOTU_G1_MONIN_R_ENABLE 0x0800 125 #define MOTU_G1_MONIN_L_CH1 0x0000 126 #define MOTU_G1_MONIN_L_CH3 0x0020 127 #define MOTU_G1_MONIN_L_CH5 0x0040 128 #define MOTU_G1_MONIN_L_CH7 0x0060 129 #define MOTU_G1_MONIN_R_CH2 0x0000 130 #define MOTU_G1_MONIN_R_CH4 0x1000 131 #define MOTU_G1_MONIN_R_CH6 0x2000 132 #define MOTU_G1_MONIN_R_CH8 0x3000 91 133 92 134 /* Mark3 device registers - these don't have MOTU_BASE_ADDR as the base