Changeset 1832
- Timestamp:
- 05/16/10 05:07:57 (2 years ago)
- Files:
-
- trunk/libffado/doc/motu_firewire_protocol-mk3.txt (modified) (3 diffs)
- trunk/libffado/src/motu/motu_avdevice.cpp (modified) (12 diffs)
- trunk/libffado/src/motu/motu_avdevice.h (modified) (4 diffs)
Legend:
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trunk/libffado/doc/motu_firewire_protocol-mk3.txt
r1828 r1832 2 2 using an 828 Mk 3. 3 3 4 Version: 2010051 0-14 Version: 20100516-1 5 5 Author: Jonathan Woithe 6 6 … … 96 96 -------------- 97 97 98 ADATmodes99 100 The modes of the two ADATports can be controlled independently. The98 Optical port modes 99 100 The modes of the two optical ports can be controlled independently. The 101 101 primary mechanism for this is via a quadlet write to register 102 102 0xfffff0000c94. 103 103 104 Bit 17: ADATport B mode (0=ADAT, 1=Toslink)105 Bit 16: ADATport A mode (0=ADAT, 1=Toslink)106 Bit 1: ADATport B enabled (0=disabled, 1=enabled)107 Bit 0: ADATport A enabled (0=disabled, 1=enabled)108 109 Other systems also appear to refresh the device status with writes to110 other registers at the time the optical mode is updated:104 Bit 17: optical port B mode (0=ADAT, 1=Toslink) 105 Bit 16: optical port A mode (0=ADAT, 1=Toslink) 106 Bit 1: optical port B enabled (0=disabled, 1=enabled) 107 Bit 0: optical port A enabled (0=disabled, 1=enabled) 108 109 Other areas of the driver also appear to refresh the device status with 110 writes to other registers at the time the optical mode is updated: 111 111 0xfffff0000c04 112 112 0xfffff0000c60 - 0xfffff0000c6c (ASCII name of clock source) … … 125 125 Clock source control and sample rate 126 126 127 The clock source is set with a quadlet write to bits 0, 3 and 4 of register 128 0xfffff0000b14. Values for bits 4-3-0: 129 0-0-0 = internal / SMTPE 130 0-0-1 = Word clock 131 1-0-0 = SPDIF 132 1-1-0 = ADAT port A 133 1-1-1 = ADAT port B 127 The clock source is set with a quadlet write to bits 0, 1, 3 and 4 of 128 register 0xfffff0000b14. Values for bits 4-3-1-0: 129 0-0-0-0 = internal 130 0-0-1-0 = SMTPE 131 0-0-0-1 = Word clock 132 1-0-0-0 = SPDIF 133 1-1-0-0 = ADAT port A / Toslink-A (depending on current optical port mode) 134 1-1-0-1 = ADAT port B / Toslink-B (depending on current optical port mode) 134 135 135 136 The sample rate is selected using bits 10-8 of register 0xfffff0000b14: trunk/libffado/src/motu/motu_avdevice.cpp
r1831 r1832 554 554 } 555 555 556 unsigned int 557 MotuDevice::getHwClockSource() 558 { 559 unsigned int reg; 560 561 if (m_motu_model == MOTU_MODEL_828MkI) { 562 reg = ReadRegister(MOTU_G1_REG_CONFIG); 563 switch (reg & MOTU_G1_CLKSRC_MASK) { 564 case MOTU_G1_CLKSRC_INTERNAL: return MOTU_CLKSRC_INTERNAL; 565 case MOTU_G1_CLKSRC_ADAT_9PIN: return MOTU_CLKSRC_ADAT_9PIN; 566 case MOTU_G1_CLKSRC_SPDIF: return MOTU_CLKSRC_SPDIF_TOSLINK; 567 } 568 return MOTU_CLKSRC_NONE; 569 } 570 571 reg = ReadRegister(MOTU_REG_CLK_CTRL); 572 switch (reg & MOTU_G2_CLKSRC_MASK) { 573 case MOTU_G2_CLKSRC_INTERNAL: return MOTU_CLKSRC_INTERNAL; 574 case MOTU_G2_CLKSRC_ADAT_OPTICAL: return MOTU_CLKSRC_ADAT_OPTICAL; 575 case MOTU_G2_CLKSRC_SPDIF_TOSLINK: return MOTU_CLKSRC_SPDIF_TOSLINK; 576 case MOTU_G2_CLKSRC_SMPTE: return MOTU_CLKSRC_SMPTE; 577 case MOTU_G2_CLKSRC_WORDCLOCK: return MOTU_CLKSRC_WORDCLOCK; 578 case MOTU_G2_CLKSRC_ADAT_9PIN: return MOTU_CLKSRC_ADAT_9PIN; 579 case MOTU_G2_CLKSRC_AES_EBU: return MOTU_CLKSRC_AES_EBU; 580 } 581 return MOTU_CLKSRC_NONE; 582 } 583 556 584 bool 557 585 MotuDevice::setClockCtrlRegister(signed int samplingFrequency, unsigned int clock_source) … … 566 594 int i, supported=true, cancel_adat=false; 567 595 quadlet_t reg; 596 unsigned int old_clock_src = getHwClockSource(); 568 597 569 598 /* Don't touch anything if there's nothing to do */ … … 644 673 645 674 // Sanity check the clock source 646 if ( (clock_source>7 || clock_source==6)&& clock_source!=MOTU_CLKSRC_UNCHANGED)675 if (clock_source>MOTU_CLKSRC_LAST && clock_source!=MOTU_CLKSRC_UNCHANGED) 647 676 supported = false; 648 677 … … 668 697 // Set up new clock source if required 669 698 if (clock_source != MOTU_CLKSRC_UNCHANGED) { 670 reg &= ~MOTU_CLKSRC_MASK; 671 reg |= (clock_source & MOTU_CLKSRC_MASK); 699 reg &= ~MOTU_G2_CLKSRC_MASK; 700 switch (clock_source) { 701 case MOTU_CLKSRC_INTERNAL: reg |= MOTU_G2_CLKSRC_INTERNAL; break; 702 case MOTU_CLKSRC_ADAT_OPTICAL: reg |= MOTU_G2_CLKSRC_ADAT_OPTICAL; break; 703 case MOTU_CLKSRC_SPDIF_TOSLINK: reg |= MOTU_G2_CLKSRC_SPDIF_TOSLINK; break; 704 case MOTU_CLKSRC_SMPTE: reg |= MOTU_G2_CLKSRC_SMPTE; break; 705 case MOTU_CLKSRC_WORDCLOCK: reg |= MOTU_G2_CLKSRC_WORDCLOCK; break; 706 case MOTU_CLKSRC_ADAT_9PIN: reg |= MOTU_G2_CLKSRC_ADAT_9PIN; break; 707 case MOTU_CLKSRC_AES_EBU: reg |= MOTU_G2_CLKSRC_AES_EBU; break; 708 } 709 } else { 710 /* Use the device's current clock source to set the clock 711 * source name registers, which must be done even if we aren't 712 * changing the clock source. 713 */ 714 clock_source = old_clock_src; 672 715 } 673 716 … … 706 749 // textual name of the current clock source be sent to the 707 750 // clock source name registers. 708 switch ( reg & MOTU_CLKSRC_MASK) {751 switch (clock_source) { 709 752 case MOTU_CLKSRC_INTERNAL: 710 753 src_name = "Internal "; … … 779 822 MotuDevice::clockIdToClockSource(unsigned int id) { 780 823 ClockSource s; 781 bool g1_model = (m_motu_model == MOTU_MODEL_828MkI);824 signed int device_gen = getDeviceGeneration(); 782 825 s.id = id; 783 826 … … 795 838 s.type = eCT_ADAT; 796 839 s.description = "ADAT optical"; 797 s.valid = s.active = s.locked = !g1_model;840 s.valid = s.active = s.locked = (device_gen!=MOTU_DEVICE_G1); 798 841 break; 799 842 case MOTU_CLKSRC_SPDIF_TOSLINK: … … 804 847 s.type = eCT_SMPTE; 805 848 s.description = "SMPTE"; 806 // Since we don't currently know how to deal with SMPTE on these devices807 // make sure the SMPTE clock source is disabled.849 // Since we don't currently know how to deal with SMPTE on these 850 // devices make sure the SMPTE clock source is disabled. 808 851 s.valid = false; 809 852 s.active = false; … … 813 856 s.type = eCT_WordClock; 814 857 s.description = "Wordclock"; 815 s.valid = s.active = s.locked = !g1_model;858 s.valid = s.active = s.locked = (device_gen!=MOTU_DEVICE_G1); 816 859 break; 817 860 case MOTU_CLKSRC_ADAT_9PIN: … … 822 865 s.type = eCT_AES; 823 866 s.description = "AES/EBU"; 824 s.valid = s.active = s.locked = !g1_model;867 s.valid = s.active = s.locked = (device_gen!=MOTU_DEVICE_G1); 825 868 break; 826 869 default: … … 867 910 MotuDevice::getActiveClockSource() { 868 911 ClockSource s; 869 quadlet_t clock_id = ReadRegister(MOTU_REG_CLK_CTRL) & MOTU_CLKSRC_MASK;912 quadlet_t clock_id = getHwClockSource(); 870 913 s = clockIdToClockSource(clock_id); 871 914 s.active = true; … … 1246 1289 1247 1290 if (port_b_mode != NULL) 1248 *port_b_mode = MOTU_OPTICAL_MODE_ OFF;1291 *port_b_mode = MOTU_OPTICAL_MODE_NONE; 1249 1292 if (getDeviceGeneration()!=MOTU_DEVICE_G3 && port_a_mode==NULL) 1250 1293 return 0; trunk/libffado/src/motu/motu_avdevice.h
r1831 r1832 62 62 #define MOTU_G2_OPTICAL_MODE_MASK (MOTU_G2_OPTICAL_IN_MODE_MASK|MOTU_G2_OPTICAL_MODE_MASK) 63 63 64 #define MOTU_CLKSRC_MASK 0x00000007 65 #define MOTU_CLKSRC_INTERNAL 0 66 #define MOTU_CLKSRC_ADAT_OPTICAL 1 67 #define MOTU_CLKSRC_SPDIF_TOSLINK 2 68 #define MOTU_CLKSRC_SMPTE 3 69 #define MOTU_CLKSRC_WORDCLOCK 4 70 #define MOTU_CLKSRC_ADAT_9PIN 5 71 #define MOTU_CLKSRC_AES_EBU 7 72 #define MOTU_CLKSRC_NONE 0xffff 73 #define MOTU_CLKSRC_UNCHANGED MOTU_CLKSRC_NONE 64 #define MOTU_G2_CLKSRC_MASK 0x00000007 65 #define MOTU_G2_CLKSRC_INTERNAL 0 66 #define MOTU_G2_CLKSRC_ADAT_OPTICAL 1 67 #define MOTU_G2_CLKSRC_SPDIF_TOSLINK 2 68 #define MOTU_G2_CLKSRC_SMPTE 3 69 #define MOTU_G2_CLKSRC_WORDCLOCK 4 70 #define MOTU_G2_CLKSRC_ADAT_9PIN 5 71 #define MOTU_G2_CLKSRC_AES_EBU 7 74 72 75 73 #define MOTU_METER_PEAKHOLD_MASK 0x3800 … … 155 153 * from the G2s. 156 154 */ 157 #define MOTU_G3_CLKSRC_MASK 0x0000001 9155 #define MOTU_G3_CLKSRC_MASK 0x0000001b 158 156 #define MOTU_G3_CLKSRC_INTERNAL 0x00000000 159 157 #define MOTU_G3_CLKSRC_WORDCLOCK 0x00000001 160 #define MOTU_G3_CLKSRC_SPDIR 0x00000010 161 #define MOTU_G3_CLKSRC_ADAT_A 0x00000018 162 #define MOTU_G3_CLKSRC_ADAT_B 0x00000019 158 #define MOTU_G3_CLKSRC_SMTPE 0x00000002 159 #define MOTU_G3_CLKSRC_SPDIF 0x00000010 160 #define MOTU_G3_CLKSRC_OPTICAL_A 0x00000018 161 #define MOTU_G3_CLKSRC_OPTICAL_B 0x00000019 162 #define MOTU_G3_CLKSRC_ADAT_A MOTU_G3_CLKSRC_OPTICAL_A 163 #define MOTU_G3_CLKSRC_ADAT_B MOTU_G3_CLKSRC_OPTICAL_B 164 #define MOTU_G3_CLKSRC_TOSLINK_A MOTU_G3_CLKSRC_OPTICAL_A 165 #define MOTU_G3_CLKSRC_TOSLINK_B MOTU_G3_CLKSRC_OPTICAL_A 163 166 164 167 /* The following values are used when defining configuration structures and … … 209 212 #define MOTU_OPTICAL_MODE_TOSLINK 0x0002 210 213 #define MOTU_OPTICAL_MODE_KEEP 0xffff 214 #define MOTU_OPTICAL_MODE_NONE 0xffffffff 215 216 /* Clock source settings/flags */ 217 #define MOTU_CLKSRC_INTERNAL 0 218 #define MOTU_CLKSRC_ADAT_OPTICAL 1 219 #define MOTU_CLKSRC_SPDIF_TOSLINK 2 220 #define MOTU_CLKSRC_SMPTE 3 221 #define MOTU_CLKSRC_WORDCLOCK 4 222 #define MOTU_CLKSRC_ADAT_9PIN 5 223 #define MOTU_CLKSRC_AES_EBU 7 224 #define MOTU_CLKSRC_LAST 7 225 #define MOTU_CLKSRC_NONE 0xffff 226 #define MOTU_CLKSRC_UNCHANGED MOTU_CLKSRC_NONE 227 211 228 /* Device generation identifiers */ 212 229 #define MOTU_DEVICE_G1 0x0001 … … 314 331 virtual void showDevice(); 315 332 333 unsigned int getHwClockSource(); 316 334 bool setClockCtrlRegister(signed int samplingFrequency, unsigned int clock_source); 317 335 virtual bool setSamplingFrequency( int samplingFrequency );
