Digidesign 003 Rack

This page is to help develop support for the Digidesign 003 Rack.

I have identified the registers below:

#define R003_BASE_ADDR          0xffffe0000000ULL

#define R003_STREAMS_W_REG      0x00000004
#define R003_STREAMS_R_REG      0x00000000
#define R003_STREAMS_OFF        0x00000000
#define R003_STREAMS_ON         0x00000001
#define R003_STREAMS_INIT       0x00000002
#define R003_STREAMS_SHUTDOWN   0x00000003

#define R003_SAMPLERATE_REG     0x00000110
#define R003_SAMPLERATE_44100   0x00000000
#define R003_SAMPLERATE_48000   0x00000001
#define R003_SAMPLERATE_88200   0x00000002
#define R003_SAMPLERATE_96000   0x00000003

#define R003_CLOCKSOURCE_REG    0x00000118
#define R003_CLOCK_INTERNAL     0x00000000
#define R003_CLOCK_SPDIF        0x00000001
#define R003_CLOCK_ADAT         0x00000002
#define R003_CLOCK_WORDCLOCK    0x00000003

ISO Channels used: 2
0x0 (recv)
0x1 (send)

To initialise the device it seems you need to do the following:

Write: R003_BASE_ADDR + R003_STREAMS_W_REG,   R003_STREAMS_INIT

Wait until:

Read:  R003_BASE_ADDR + R003_STREAMS_R_REG 

returns

R003_STREAMS_OFF

Once this is done, the 1394 link light starts flashing on the device.

Then set the samplerate and clock source, eg 48000/internal clock

Write: R003_BASE_ADDR + R003_SAMPLERATE_REG,  R003_SAMPLERATE_48000
Write: R003_BASE_ADDR + R003_CLOCKSOURCE_REG, R003_CLOCK_INTERNAL

Then activate the streams:

Write: R003_BASE_ADDR + R003_STREAMS_W_REG,   R003_STREAMS_ON

Wait until:

Read:  R003_BASE_ADDR + R003_STREAMS_R_REG 

returns

R003_STREAMS_ON

But I have not yet been able to observe iso data on the bus after this is done.

Iso packets from the device are supposed to look like this:

418922  data_length=0x01d0, tag=0x1, channel=0x00, iso_data, sy=0x0, crc=0xd3082841, data=[00130090 90020000 80000000 40ffffab 4000002b 40fffd57 40ffff3f 40fffff0 40000006 40ffffef 40fffff1 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 80000000 40ffffeb 40ffffdb 4000015a 40ffffae 40ffffee 40fffff8 40fffff5 40fffffe 40000000 40000000 (336 more bytes)], crc=0x8ccc5134, no ack

419029  data_length=0x021c, tag=0x1, channel=0x01, iso_data, sy=0x0, crc=0xf2bcef97, data=[001300bb 90020000 80000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 80000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 (412 more bytes)], crc=0x8414747c, no ack

419045  data_length=0x01d0, tag=0x1, channel=0x00, iso_data, sy=0x0, crc=0xd3082841, data=[00130096 90020000 80000000 40ffffc0 40000048 400005c2 40ffff86 40fffffd 4000000a 40ffffe3 40fffff7 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 80000000 40000073 4000002b 40fffda7 40ffff78 40ffffe5 40ffffe4 40000014 40ffffe9 40000000 40000000 (336 more bytes)], crc=0x24851d3c, no ack

419154  data_length=0x021c, tag=0x1, channel=0x01, iso_data, sy=0x0, crc=0xf2bcef97, data=[001300c2 90020000 80000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 80000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 40000000 (412 more bytes)], crc=0x498d307d, no ack

These are standard CIP packets (with some missing fields) containing standard AMDTP data.

The first two quadlets of each iso packet are the CIP header:

bits	meaning
31-30	00
29-24	should be source node ID, here 0
23-16	data block size in quadlets
15-8	00000000
7-0	data block count
31-30	10
29-24	format, 010000 = audio/music
23-16	format-dependent field: 00000xxx for "AM824"-labeled data, x = 32/44.1/48/88.2/96/176.4/192/reserved kHz
15-0	should be synchronization timestamp, here 0

A "data block" is all the data of one audio frame; e.g., at a rate of 44.1 kHz, there are 44100 data blocks per second, somehow distributed over 8000 FireWire iso packets.

The data block count is the number of the first data block in the packet, modulo 256; this is intended to help detecting missing packets.

Labeled AM824 data is 40xxxxxx for a 24-bit PCM sample, or 80000000 for no MIDI data, or 81xx0000 for one MIDI byte. Every eighth MIDI quadlet is for one MIDI port, i.e., (up to) eight MIDI channels are multiplexed into one AM824 channel. (The Digi003 is unusual in that the MIDI quadlet is first in the data block, not last.)

FFADO's AMDTP streaming processors should be able to handle this.

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It seems that after patching libraw1394 with the start_cycle patch, the iso streams turn on.

Since the maximum number of bytes the device can stream is 624 per packet, and there are 8000 iso firewire packets per second, and the device only supports 8 frames per packet, the maximum sample rate is 48000Hz using all 19 channels. I believe the device does not support ADAT channels in modes above 48000Hz.

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I have written a working ffado driver for playback. However there is one glitch: the device keeps sending the following async packet (during iso transmission) to the host expecting a response, and I don't know how to handle it, the pc just returns address error and the device continues sending the packets interrupting playback... :|

dest=0xffc2 (PC), write_block_request, src=0xffc1 (003Rack), offs=0xffff00000000, data=[00007051]

data=[00007058] if the stream dies.

Damo